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LED点阵
- 大屏幕led点阵显示的驱动时序。 使用vhdl语言描述。其中rom文件可以使用lpm_megcore自动生成。-big screen led to the dot matrix display driver timing. The use of VHDL descr iption language. Rom which documents can be automatically generated using lpm_megcore.
dcm
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
ddr
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
distributed_ram
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
lvds
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
multiplexers
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
multipliers
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
shift_registers
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
sum_of_products
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
Examples_VHDL
- Examples of VHDL Descr iptions ROM-based waveform generator-Examples of VHDL Descr iptions ROM-based w aveform generator
ram
- 本原代码中利用VHDL语言编写了RAM、FIFO、ROM等常用的存储和缓冲部件，完全的代码在ALTERA的FPGA上已经通过仿真测试，保证可用.-primitive code using VHDL prepared RAM, FIFO, ROM, and other commonly used storage and buffer components, complete code in the Altera FPGA simulation test has been passed to ens
rom2
- vhdl rom 程序，标准的rom程序，很简单
solution1324
- SX-CPLD/FPGA 数字逻辑电路设计实验仪 SX-CPLD/FPGA 数字逻辑电路设计实验仪 产品介绍 1.利用CPLD/FPGA 提供的软硬件开发环境学习最新逻辑IC 设计，以取代TTL/CMOS 复杂的硬件设计。 2.可使用电路绘图法、ABEL 语言、波形图和数字硬件描述语言法(VHDL/AHDL)来开发电路。 3.CPLD/ FPGA 提供引脚可任意设定,故作测试实验时不需要做硬件连接,可节省大量连线焊接时间,快速学习软硬
64×8bitROM
- 64×8bit 的ROM设计，VHDL语言，在ISE可以运行。
32×8bitROM
- 32×8bit的ROM设计，VHDL语言，在ISE可以运行。
Count_4
- VHDL源码其中“music_rom”使用FPGA厂商提供的工具生成的，如Altera的Quartus II 及其宏功能生成的这些文件。 另外，我们还希望实现以下功能： * 播放音乐时，在ROM的结尾处暂停 * \"fullnote\"值为0时，表示静音 所以我们将原来的程序的最后一行从
19_ROM
- ROM vhdl source code for beginners
blockRomTest
- it is a rom with vhdl
TesteROM
- ROM Test - VHDL Project
328 ROM module
- 32 byte ro0n moudule implementation in vhdl code