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SDRAM
- C6416对于 2M * 64位的sdram 的读写程序 可用于软件无线电中dsp部分的数据存储和读取-C6416 for 2M* 64-bit sdram read and write procedures for dsp software radio and read some of the data storage
SRAM--SDRAM--FLASH
- SRAM和SDRAM的区别，存储器之间的区别-The difference between SRAM and SDRAM, pay attention to the difference between them
mt48lc4m16a2
- 模拟micron的sdram的 VHDL 代码，用于验证自己的sdram控制器。-Micron sdram the VHDL simulation of the code used to validate their sdram controller.
FPGA-DDR-SDRA
- 基于FPGA 的DDR SDRAM高速数据采集的应用-DDR SDRAM high-speed FPGA-based data acquisition applications
sdram_mdl
- verilog编写的对SDRAM的控制的源代码，开发FPGA/CPLD-verilog SDRAM write control of the source code, development FPGA/CPLD
SDRAM-Verilog-HDL
- SDRAM控制器Verilog HDL-source-code.rar-SDRAM-controller-Verilog HDL-source-code.rar
sdram_ip_doc_preliminary
- 关于的SDRAM ip核相关资料汇总，SDRAM,SDRAM-On the SDRAM ip summary of nuclear-related materials, SDRAM, SDRAM
DDR-SDRAM
- 本应用指南描述了在 Virtex™ -4 XC4VLX25 FF668 -10C 器件中实现的 DDR SDRAM 控制器。该实现运用了直接时钟控制技术来实现数据采集，并采用自动校准电路来调整数据线上的延迟。-This application note describes a Virtex ™ -4 XC4VLX25 FF668-10C to implement the DDR SDRAM device controller. The clock control to ach
sdram-controller
- 使用于FPGA上的通用sdram controller模块，用于在FPGA上实现sdram接口-Used in general sdram controller on FPGA module for the interface in the FPGA to achieve sdram
sdram
- 关于SDRAM的读写相对比较复杂，本文件是基于FPGA的SDRAM的读写，可做参考-SDRAM read and write on the relatively complex, this document is based on the FPGA-SDRAM read and write, do reference
ourdev_536218
- 利用 MAX II CPLD 实现移动 SDRAM 接口-Using MAX II CPLD to implement mobile SDRAM Interface
sdram
- 高手进阶，终极内存技术指南——完整，对sdram做了非常详细的介绍。-Advanced master, the ultimate guide to memory technology- full of sdram done a very detailed introduction.
SDRAM_info
- sdram的基础资料，可为系统设计人员提供相应的技术领域的技术支持-sdram base information for system designers to provide appropriate technical support technology
SDRAM
- DSP 28335\28335_SHIYAN\SDRAM程序代码-DSP 28335 \ 28335_SHIYAN \ SDRAM code
SDRAM
- sdram，在fpga数据传递领域应用广泛，乒乓操作，不同频域的数据传递，都靠sdram来转换。-SDRAM VHDL FPGA FIFO
SDRAM-Modelsim
- SDRAM读写控制的实现与Modelsim仿真-SDRAM read and write control to achieve with Modelsim Simulation
SDR_SDRAM_IP
- SDR SDRAM 控制器，Altera官网重要资料。内涵说明文档，和VHDL与Verilog两种设计IP。-SDR SDRAM controller from Altera
memorytest
- S3C2440芯片的SDRAM 检测程序-S3C2440 chip SDRAM testing procedures
FPGA-SDRAM-read-and-write-examples
- FPGA读写SDRAM的实例，内含源代码，希望对大家有帮助。-FPGA SDRAM read and write examples, including source code, we want to help.
test_sdram
- 对SDRAM进行读写，工程内部分为PLL以及复位处理模块、写SDRAM逻辑模块、读SDRAM逻辑模块、SDRAM读写封装模块、读写缓存FIFO模块、串口发生模块等。工程基于altera的Quartus II 10.1进行设计，使用更高版本的软件均可。-SDRAM read and write for the project is divided into the internal PLL and reset processing module, SDRAM write logic block,