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jibenmendianlu
- 熟悉使用 ISE 软件进行简单的VHDL 文本方式设计，学习使用USB 电缆或并口下载线 下载逻辑电路到FPGA，并能调试电路使其正常工作。熟悉数字电路集成设计的过程。-Familiar with ISE software to design a simple VHDL text, learning to use a USB cable or parallel port download cable Download logic to the FPGA, and can debug t
duolufuyongqi
- 1. 学习使用 ISE 软件，并用VHDL 语言设计多路复用器； 2. 使用 USB 电缆下载逻辑电路到FPGA，并能根据电路原理调试电路使其正常工作； 3. 掌握数字电路集成设计的过程-1 Learn to use ISE software, and design using VHDL language multiplexer (2) using a USB cable to download logic to the FPGA, and debug circuit accor
bianmaqijimaqi
- 进一步熟悉 ISE 软件的使用，进行简单的VHDL 文本方式设计，学习使用USB 电缆下载逻辑 电路到FPGA，并能调试电路使其正常工作。熟悉数字电路集成设计的过程。-More familiar with the use of ISE software, a simple way to design the VHDL text, learning to use the USB cable to download logic Circuit to the FPGA, and can de
Fusbb_xilinxxP
- 一种基于FPGA的usb程序源码，，使用VHDL语言开发。 -An FPGA-based the usb program source, using VHDL language development.
NIOS_USBDEVICE
- FPGA QUARTUS USB总线通讯模块程序，常用模块。-FPGA QUARTUS USB bus module ,written by vhdl tools,a useful module.
usb_in
- 基于VHDL的USB读写程序 只供参考哦 -VHDL-based USB reader program
usbblaster
- 老外原版的 altera usb 下载线 vhdl源码 -the altera usb download cable vhdl source
USB_BLASTER_code
- 用于制作ALTERA FPGA的下载线（USB_BLASTER）的CPLD逻辑代码（VHDL代码）。-USB BLASTER CODE DDFP SDFA SDE DSF DOD DOE DOE DOIII DEG SDAF, FSGR SE.
Codes
- USB 2.0 using VHDL with files : main.c, drice.c and HIGH_SPEED_USB_CORE_SETUP_TRANSACTION
PDIUSB
- 用VHDl语言实现USB与FPGA接口模块代码-VHDl language with USB and FPGA Interface Module code
usb3300_20081015.tar
- usb sourcecode in vhdl along with document explaining it.test bench also added.
fpga_usb_serial_20131205.tar
- usb serial core is a vhdl synthesizable code, implementing serial data transfer over usb. Combine with a UTMI-compatible transceiver chip, this core acts as a USB device that transfers a byte stream in both directions over the bus
usb_packet_fifo
- usb packet fifo VHDL
20150608
- 使用VHDL设计双通道高速ADC采集电路，将模拟数据采集，USB发送到计算机- Using VHDL to design a dual channel high-speed ADC acquisition circuit, the analog data acquisition, USB sent to the computer
IP
- USB+UART+I2C+VGA+ARM7+MC8051 altera IP核-USB+UART+I2C+VGA+ARM7+MC8051 Verrlog VHDL
USB_fx2_engine
- This code is the VHDL source code of the USB communication between FPGA device and host device(PC).
USB_SoftLock
- USB SoftLock, 包含VHDL for Xilinx FPGA，上位机驱动以及应用程序-USB SoftLock, Include VHDL for Xilinx FPGA, PC Driver and App
FPGA_USB_Communication
- 本软件利用USB控制芯片cy7c68013A实现了USB通讯。压缩文件包括在fpga里面编程的vhdl软件-This software uses the USB control chip cy7c68013A to achieve the USB communication. The compressed file include programming in FPGA VHDL software
Zedboard_Camera_PCB
- camera and zedboard, vga
jhyb
- the vhdl model of usb it is very helpful()