搜索资源列表
fftshixian
- OFDM系统中FFT的Verilog HDL 语言实现。-OFDM system FFT of Verilog HDL language.
cf_fft_1024_8
- 用verilog编写的1024点的fft快速傅立叶变换-Verilog prepared using 1024 point fft Fast Fourier Transform
cf_fft_256_8
- This is a source code of 256 point fft architecture. This code is also available with opencores-This is a source code of 256 point fft architecture. This code is also available with opencores
design
- The verilog implementation of 8-point FFT in verilog. Radix 2 Decimation in Frequency.
fftverilog
- verilog写的 fft 程序 大家 下载吧 希望能够喜欢-fft write verilog program we hope to be able to download it like Ha, ha, ha
fft_hdl
- 一个 16点 FFT 用基2蝶形运算单元完成，有测试环境。-16 points FFT with a radix-2 butterfly computation unit is completed and test environment.
fft
- 用verilog语言编写的基于DA结构的滤波器的实现-filter
fft2
- 512点8位基2fft程序。基于 vhdl/verilog。已仿真布线通过。-512 points, eight base 2fft program. Based on vhdl/verilog. Simulation layout has been adopted.
cfft
- 用verilog语言编写的基4FFT，采用CORDIC算法实现的，仿真过，结果很好！-I use verilog language to design a FFT base 4,and use CORDIC arithmetic to achieve this. last , I test it, it looks very good
FFT_matlab_hdl_code
- FFT 的MATLAB仿真，和Verilog硬件实现-FFT : MATLAB and Verilog simulation
64R4SDFpoint_FFT
- 该工程实现了一个64点FFT，verilog编写，采用R4SDF结构，通过Modelsim功能仿真，压缩包里有rtl代码，dc脚本，输出报告。-The project implements a 64-point FFT, verilog compiled by R4SDF structure, through the Modelsim functional simulation, compression bag with rtl code, dc scr ipt, the output repo
64pointFFTR2MDC
- 该工程实现了一个64点DIF FFT，verilog编写，采用R2MDC结构，通过Modelsim功能仿真，压缩包里有rtl代码，dc脚本，输出报告。-The project implements a 64-point DIF FFT, verilog compiled by R2MDC structure, through the Modelsim functional simulation, compression bag with rtl code, dc scr ipt, the out
fft_fpga
- FFT（快速傅里叶变化）蝶形算法 Verilog HDL语言-FFT Verilog HDL
FFT8
- FFT8，8点FFT运算，用verilog vhdl 语言编写，可以应用于64点FFT-FFT8, 8 点 FFT computation, using verilog vhdl language, can be applied to 64-point FFT
fft
- 用Verilog语言实现 fpga 上的 fft功能-The fft function to achieve fpga
fft3
- 是用verilog写的FFt源码，通过编译基本是正确，希望对大家有所帮助-Is written FFt verilog source code, compile basic right, we want to help
phase
- FFT algorithm using verilog
fft
- Quartusii的FFT,使用Verilog HDL 语言的FFT-FFT based on Quartusii
rax2
- rax2 fft implation the fft in verilog instance and in ise of xilinx it show how to istance fft core and the port used
pipelined_fft_64
- 利用IP Core编写的Verilog程序，实现FFT变换，希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.