搜索资源列表
fpga-pinball_for_c
- VHDL 基于FPGA 和VGA 接口的应用设计-vhdl
vga_colors
- 通过vga通讯控制显示器显示七彩条文，通过quartus编译的程序，可用-Communication and Control through the vga display colorful provisions quartus compiled through the procedures that can be used
alltest_c35
- FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
C20_SD
- FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
C20_sram_vga
- FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
FPGA_SEG7_V4
- FPGA应用如sd卡控制，led控制，vga音频控制-Sd card FPGA applications such as control, led control, vga audio control
source_code
- 基于FPGA的vga实现，用于显示一行文字"伟杰电子FPGA开发系统 "-FPGA-based realization of the vga, used to display a line of text " Weijie e-FPGA Development System"
FPGA-LCD
- 基于FPGA的LCD&VGA控制器设计 字数不够-FPGA-based controller design for LCD & VGA
4559939-VGA-Video-Signal-Generation
- source code VGA for Xilinx FPGA Spartan 3E
VGA
- 基于单片机51核的FPGA VGA显示实例，肯定有现象哈-51 single-chip core-based FPGA VGA display examples of the phenomenon certainly Kazakhstan
altera-schemic-
- FPGA应用，Altera的FPGA开发板原理图汇集，FPGA最小系统，rs232串口转换，VGA显示-FPGA applications, Altera' s FPGA development board schematic pooling, FPGA minimum system, rs232 serial converter, VGA display etc.
verilog-VGA
- 在FPGA内，实现简单的VGA显示功能。verilog源代码-In the FPGA, the realization of a simple VGA display. verilog source code
de2_dac_lcd
- FPGA KIT DE2-35 This project outputs a selected voltaje using VGA DAC, the DAC module is controlled using LCD display and buttons.
fpga
- fpga数字电子系统设计与开发 ISE I2C UART usb vga -ISE I2C UART usb vga
vga
- 从fpga到vga输出的verilog程序，信号包括了RGB,VSYNC,HSYNC信号！-the program in verilog from fpga to vga ,which includes the signal of red\green\blue and vsync\hsync.
vga
- 在显示器上画虚线方框和虚线圆，并且方框和圆都能扩大、缩小。-Dashed line painted on the display boxes and dotted circle, and the boxes and circle can expand and narrow
vgav2
- fpga vga 输出，60HZ 640*480 8位灰度图像 采用verilog语言编写-fpga 640*480 60HZ vga output，writed in verilog
DE2_TV_PAL
- video信号pal制转vga输出，fpga verilong语言编写-fpga pal to vga ，writed in verilog
vga_control
- this a spartan 3E base project file. this is the project of game in which vga is interfaced to FPGA. this file is main file in which vga timing is maintained.-this is a spartan 3E base project file. this is the project of game in which vga is i