搜索资源列表
pong_game
- pong游戏的verilog代码，只上传了核心模块的代码，其他模块包括vga驱动和ps2键盘解码-the core code of the pong game, other module include vga and ps2 keyboard driver
OV7670_VGA
- verilog写的VGA视频处理代码,里面有完整的工程项目-Written by verilog VGA video processing code
A
- 此为用verilog hdl编写的FPGAproject 其中A5+工程为带vga显示 分辨率600*800@60HZ 带字母显示（直接将ASCII码输入到寄存器中 窗口大小可调整）；A1工程为软核处理器 可配合使用 实测功能强大-This is written in Verilog HDL FPGAproject the A5+ engineering with VGA display resolution 600*800@60HZ with letters display directly
hengtiao
- 基于FPGA的VGA显示设计,显示彩色横条，编程语言为Verilog HDL。-Design of FPGA based on the VGA display, display color bar. The programming language is Verilog HDL.
vga_driver
- verilog语言设计的VGA驱动。在Quarus11.0下编译成功，并在Altera cyclone4开发板上测试OK-verilog language design VGA driver. In Quartus11.0 successfully compiled and Altera cyclone4 development board test OK
VGA_caidai_zifu_juxing
- verilog实现VGA显示的代码，包括驱动，时钟管理，显示的全部，代码中包括三个实例，一个最常见的八个彩带型，一个矩形框，一个魔幻彩带显示实现，全部代码实现。-verilog implementation code VGA display, including the driver, clock management, all of the code displayed include three instances, one of the most common type of eight
VGA_pic_200x200x3(ok)
- altera 系列FPGA实现的VGA显示8色的图片，调试通过，开发环境quartusii , 语言verilog。-Altera series FPGA to achieve the VGA display 8 color images, debugging through, the development environment QuartusII, language verilog.
colorchecker
- coloecheck VGA格式标准色卡生成，可支持任意分辨率设置 verilog-colorchecker VGA format standard color card production, can support any resolution settings
VGAdisplay_picture
- verilog控制VGA显示器显示一幅像素为200*200的图片。-verilog control VGA display a 200 x 200 pixel images.
LAB0
- 用verilog代码控制VGA显示屏显示蓝色屏幕。-The verilog code controls the VGA display to display a blue screen.
lab1
- 在ISE开发环境中用verilog语言控制VGA显示器显示单色。-In the ISE development environment with verilog language control VGA display monochrome display. monochrome.
LAB22
- 应用verilog编程语言控制VGA显示屏显示一幅图片。-Application verilog programming language control VGA display shows a picture.
S9_VGA_colorbar
- 红色飓风FPGA开发板提供的VGA接口例程，verilog实现决对也可以参考使用。-FPGA verilog vga
OV7670_DDR2_VGA
- 在FPGA下的视频采集显示，采用纯Verilog编写，其中包括有OV7670摄像头，高速存储器DDR2，ADV芯片的VGA。-In FPGA video capture display, using pure Verilog prepared, which includes OV7670 camera, high-speed memory DDR2, ADV chip VGA.
5_Gray_Mean_Filter
- 均值滤波是典型的线性滤波算法，（Verilog HDL）设计所需的模块有： （1）带PLL的全局时钟管理模块 system_ctrl_pll.v （2）OV7725 COMS Sensor的初始化模块 i2c_timing_ctrl、I2C_OV7725_RGB565_Conofig （3）OV7725 COMS Sensor的视频信号采集模块COMS_Capture_RGB565 （4）SDRAM数据交互控制器Sdram_Control_2Port （5）VGA时序
Experiment
- 经典入门verilog入门程序20个，从流水灯到液晶显示包括VGA驱动 入门必备精品-Classic entry Verilog entry procedures 20
hit_the_block
- 数字逻辑课程大作业，使用verilog语言编写的打砖块游戏。通过FPGA按钮控制弹板移动，反弹小球，控制小球方向，击打砖块。有VGA模块。-Digital Logic Courses big operations, the use of Verilog language brick game. The FPGA button controls the movement of the board, bounces the ball, controls the direction of the ba
Nexys4FFTDemo-master
- A simple Verilog example of a 4096pt FFT on analog input from a Nexys 4 XADC. The input is sampled at 1MSPS, oversampled to produce 14-bit samples at 62.5kHz, then sent to the FFT processing modules and passed through to PWM Audio out. The FFT output
HanoiTower
- 使用Verilog HDL 以及VHDL语言，运用FPGA中的VGA显示原理以及键盘控制原理，开发汉诺塔简易游戏(The use of Verilog HDL and VHDL language, the use of FPGA in the VGA display principle and keyboard control principle, the development of Hanoi simple game)
五子棋
- 五子棋 主要用到了VGA和PS2接口的外设 基本实现了双人对战五子棋的功能。感觉有很多纰漏，想请大家指点下。(five-in-a-row vga ps2 fpga vhdl verilog)