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4_31
- 这是一个交织器/解交织器的FPGA实现，虽然交织器的功能简单，但是其实现比较复杂-This is an interleaver/de-interleaver to achieve the FPGA, although the function of interleaver simple, but its more complicated to achieve
rams
- 一个简单的rom的VHDL描述，希望对大家有点帮助-Rom a simple descr iption of VHDL, in the hope that we are a bit to help
singt
- 用VHDL语言描述的用锁存器，加法计数器，ROM存储器构成的RTL图-VHDL language used to describe the use of latches, adding counters, ROM memory map consisting of RTL
CPLD_CD
- 《CPLD开发实例》的配套光盘文件，包含大量的CPLD小程序，用VHDL语言描述-" CPLD development of examples of" CD-ROM of supporting documents, including a large number of small procedures CPLD, VHDL language used to describe
correlator
- 代码主要说明了乘积检波器的vhdl描述，同时压缩包中还附带的与之相关的rom,mul4*4乘法器的vhdl描述。 用quartus2软件即可打开使用。-Code shows the main detectors of vhdl product descr iptions, at the same time compressed package also comes with associated rom, mul4* 4 multiplier vhdl descr iption. Quart
FPGAshili
- 学习VHDL语言时买的教科书后面的光盘，有20个典型的VHDL编写的程序，是学习VHDL和FPGA的非常好的资料，很多程序在网上是找不到的。-VHDL language learning textbook buy back the CD-ROM, 20 a typical procedure for the preparation of the VHDL, VHDL and FPGA to learn the very good information, many procedures are
TLC5510VHDL
- 8.5 TLC5510 VHDL控制程序 见随书所附光盘中文件：TLC5510VHDL程序与仿真。 --文件名：TLC5510.vhd --功能：基于VHDL语言，实现对高速A/D器件TLC5510控制 --最后修改日期：2004.3.20 -8.5 TLC5510 VHDL control procedures, see the book with accompanying CD-ROM in the file: TLC5510VHDL procedures and sim
DEMO_44_ROM
- 这是用vhdl语言描述一个rom的源代码，欢迎大家下载-This is the language used to describe a vhdl source code rom, welcome you to download
vhdl_rom
- 可生成rom.初学者可以看看。很不错的。理解后生成rom很容易的。-LPM_ROM .It is good for VHDL new learner
LPM_ROM
- 可生成rom.初学者可以看看。很不错的。理解后生成rom很容易的。-LPM_ROM .It is good for VHDL new learner
Sinusoidalsignalgenerator
- 用硬件描述语言vhdl中的ROM模块实现正弦信号发生器 -Sinusoidal signal generator
RAM.ZIP
- VHDL CODE FOR RAM AND ROM
ROM_based_sine_wave_generator_VHDL_design
- VHDL基于ROM的正弦波发生器的设计的实验报告，内附源代码-ROM-based sine wave generator VHDL design of experiment reports, included the source code
renyiboxing
- 信号发生器是一种常用的仪器，能够实现各种波形，不同频率的输出，电子测试系统的重要部件。本研究 的数字信号发生器足基于直接数字合成即DDS技术设计的，采用VHDL与C语言相结合的方法，通过查找存储 于ROM查找表中的各种标准波形数据，产牛频率Hf调并且高精度的正弦波、方波、锯齿波等常用信号，并且町 以通过修改表中的数据，实现任意信号发生器-Signal generator is a commonly used instrument to achieve a variety of wav
ram_latest
- VHDL实现CISC模型微处理器设计（含有rom和ram）本程序实现的是输入10个数，输出最小负数-VHDL model to achieve CISC microprocessor design (with rom and ram) to achieve this procedure is the number of input 10 and output the smallest negative
KID_ROM
- VHDL实现的只带rom的CISC模型微处理器设计 实现的是输入10个数，输出最小负数-VHDL implementation of the model with only rom the CISC microprocessor designs Realize that the number of input 10 and output the smallest negative
aahr
- vhdl下编写的rom,vhdl专用这个编程能帮你学习到老-it s very good!when you download this one ,it s good for your study
synth_fft
- 用VHDL语言实现rom存储,可以选择不同的存储空间，有多种控制信号-Rom storage using VHDL language, you can choose a different storage space, there are several control signals
Group27_lab5
- VHDL的基本门，ram，rom等的实现-VHDL basic door, ram, rom, etc. to achieve
vhdl2
- vhdl语言正弦信号发生器设计，传统的用分立元件或通用数字电路元件设计电子线路的方法设计周期长,花费大, 可移植性差。本文以正弦波发生器为例,利用EDA 技术设计电路,侧重叙述了用VHDL 来完 成直接数字合成器(DDS) 的设计,DDS 由相位累加器和正弦ROM 查找表两个功能块组成,其 中ROM查找表由兆功能模块LPM-ROM来实现。-The traditional use of discrete components or general purpose digital cir