搜索资源列表
ALU_ise10migration
- It s vhdl source code for 32 bit ALU.
原代码
- 8051核的vhdl原代码。-8051 core VHDL source code.
jpeg
- 这是一个JPEG的编解码的VHDL程序代码-This is a JPEG codec the VHDL code
VHDL
- 自己收集的VHDL例程代码,适合初学者学习用,希望能给大家带来帮助。-Collected their own routines VHDL code, suitable for beginners to learn, I hope we can help.
16Point-FFT
- 16点FFT VHDL源程序,The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input data is a vector of 16 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary component of a
coswave
- 主要是通过Altera公司的Cuclone系列的FPGA-EP1C3T144C8产生余弦波的源代码 基于LPM-ROM余弦波一周期含有256个10位数据;-Mainly through Altera s Cuclone series of FPGA-EP1C3T144C8 cosine wave generated source code based on the LPM-ROM cosine wave of one cycle containing 256 10-bit data
VHDL
- 一个实现整数分频的VHDL代码,只要把n设置成你所需要的分频的数值就行-A realization of an integer divider of the VHDL code, as long as the n set you need the sub-frequency values on the line
UART
- 串口实验,很好用,我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
davincihd_revf_ver6
- DaVinci HD CPLD Firmware Resources 这是TI原装开发板DM6467原理图的 CPLD的VHDL代码,是Spectrum Digital, Inc刚开发出来的! CPLD Firmware Project CPLD Firmware Project (Version 6).-DaVinci HD CPLD Firmware Resources This is the original TI development board DM6467 Schema
Trafficlight
- 系统设置一个两位BCD码倒计时计数器(计数脉冲1HZ),用于记录各状态持续时间; 因为各状态持续时间不一致,所以上述计数器应置入不同的预置数; 倒计时计数值输出至二个数码管显示; 程序共设置4个进程: ① 进程P1、P2和P3构成两个带有预置数功能的十进制计数器,其中P1和P3分别为个位和十位计数器,P2产生个位向十位的进位信号; ② P4是状态寄存器,控制状态的转换,并输出6盏交通灯的控制信号。-System to set up a two BCD code c
UART
- 内含有完整的UART代码,包括发送和接受,且有testbench,可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
codeloc1k
- 实现电子密码锁的各项功能,经过编译和仿真-Electronic code lock of the function, the compiler and simulation
fcsr
- 伪随机序列产生器-代进位反馈移位寄存器,verilog hdl 原代码。-Pseudo-random sequence generator- on behalf of binary feedback shift register, verilog hdl original code.
vhdl
- 经过验证的UART硬件描述语言(VHDL)代码,非常实用。-Verified UART hardware descr iption language (VHDL) code, very useful.
Digitalfilter
- 一篇基于FPGA的数字滤波器的小论文,附带有VHDL源码-An FPGA-based digital filter small papers, comes with VHDL source code
FIR_VHDL
- FIR滤波器的VHDL代码,可以修改冲击函数的值-FIR filter VHDL code can modify the impact of the value function
DDR_SDRAM_controller
- DDR SDRAM控制器的VHDL源代码,含详细设计文档。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides t
signalprocess_fft_VHDL
- 一篇用VHDL实现快速傅立叶变换的论文,包括原理分析和代码实现,印度圣雄甘地大学M.A.学院提供,同时包含使用手册,做FFT很好的-VHDL with a fast Fourier transform papers, including the principle of analysis and code, India Mahatma Gandhi Institute of the University of MA, at the same time contains the user manu
vhdl
- 几个VHDL的源码小程序,对学习硬件描述语言很有用的哦 !-VHDL source code a few small procedures, hardware descr iption language learning useful Oh!
traffic-VHDL
- 最简便的交通灯控制源代码 适合VHDL初学者 十字路口红绿灯控制,数码管显示-The most simple traffic lights to control the source code for VHDL beginners crossroads traffic lights control, digital display