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t65
- Full VHDL code for T60 processor-Full VHDL code for T60 processor....
samlecode.vhdl
- THis code describes how to use the pwm singal generator and how to generate this using VHDL>
LinPF_RLS
- VHDL code for linear prediction filter based on RLS (recursive least square). Filter order is set to 4, bit precision set to 12 bits for input and output. Signals are complex signals.
main1
- vhdl code for vga port interfacing of spartan 3 (xilinx) displaying colour pattern
alu32
- 32 bit ALU design using VHDL code for Xilinx ISE Foundation
cube-v04-code
- 3x3x3 Assembly led cube code
PLL.ZIP
- the code specifies how to model a pll using vhdl code
mdf-code-xilinx
- median filter code in VHDl
com1402soft
- vhdl code of qam bpsk
CameraLink-source-code
- 基于FPGA的多路CameraLink数据的发送和接收程序源码-FPGA-based multi-CameraLink data sent and received program source code
61EDA_D506
- 一个dwt的 vhdl code，非常实用-dwt of vhdl code
mapper
- vhdl code for mapping the real and quadrature QAM Symbol
FIFO24_CS8416[1]
- Fifo buffer vhdl code
D_flip
- source vhdl code of D flipflop logic
fibonacci
- source vhdl code implement Fibonacci series in hw
fir
- this is an vhdl code for fir filter-this is an vhdl code for fir filter....
09912007AEScoremodules
- aes descr iption architecture processes vhdl code with pipelining and throughput reduction with an aim to create a faster AES decoding system in FPGA
Simulink-to-VHDL-Route
- This paper presents the way of speeding up the route from the oretical design with Simulink/Matlab, via behavioral simulation in fixed-point arithmetic to the implementation on either FPGA or custom silicon. This has been achieved by porting
VHDL-Example-2
- fir filter vhdl code
partiy-generator
- hi this is vhdl code for parity generator/checker