搜索资源列表
MPSK调制与解调VHDL程序与仿真
- MPSK调制与解调VHDL程序与仿真,具有很高的参考价值!!vhdl代码!-MPSK modulation and demodulation process and VHDL simulation, high reference value! ! VHDL code!
CUS_SPI-VHDL
- 此为VHDL的SPI通信代码，全部在一个压缩包中，请仔细阅读后再使用．-this as VHDL code SPI communication, all in a compressed package, please read carefully before use.
VHDL.fifo
- 在网上找到的通用存储器vhdl代码库，觉得挺好用的。-the Internet to find the common memory vhdl code library, feeling very good use.
8051-vhdl-code
- 单片机8051 IP内核的VHDL源码，需要的开发环境QUARTUS II 6.0。
VHDL_TP3067_PCM.用VHDL写的控制TP3067实现PCM编译码程序
- 用VHDL写的控制TP3067实现PCM编译码程序 包括系统原理图，VHDL源程序,各部分电路仿真。及完整的课程设计报告 ,To use VHDL to write the control of TP3067 to achieve PCM encoding and decoding procedures, including system schematic, VHDL source code, the part of the circuit simulation. And complete
LCD.LCD显示的完整代码
- LCD显示的完整代码，采用Verilog编写！！！！！！！！,LCD display complete code, the use of Verilog to prepare
两路十字路口的交通灯控制的VHDL源码
- 两路十字路口的交通灯控制的VHDL源码，毕业设计，,Two-way traffic lights at the crossroads of the VHDL source code control, graduation design,
Spartan3E.rar
- Spartan3E的LCD字符滚动显示源程序，具体内容见注释,Scroll Spartan3E character LCD display the source code, see the specific contents of the Notes
VHDL-code-specification
- vhdl的代码规范。包括命名、语句使用等。注重可移植性以及硬件资源的节约。-vhdl code specifications. Including naming, such statements use. Attention to portability and hardware resource conservation.
8085-vhdl-code
- 8085 VHDL code that you can use on FPGA
1.-VHDL-Code-For-BCD-To-Decimal-Decoder-By-Data-F
- 1. VHDL Code For BCD To Decimal Decoder By Data Flow Modelling
VHDL-Code-For-Full-Subtractor-By-Data-Flow-Modell
- VHDL Code For Full Subtractor By Data Flow Modelling
VHDL-Code-For-Half-Subtractor-By-Data-Flow-Modell
- VHDL Code For Half Subtractor By Data Flow Modelling
VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling.z
- VHDL Code For Full Adder By Data Flow Modelling
VHDL-Code-For-Half-Adder-By-Data-Flow-Modeling.zi
- VHDL Code For Half Adder By Data Flow Modeling
VHDL-Code-For-BCD-To-Excess3--Code-Converter-By-D
- VHDL Code For BCD To Excess3 Code Converter By Data Flow Modelling-VHDL Code For BCD To Excess3 Code Converter By Data Flow Modelling
VHDL-Code-for-8-bit-Floating-Point-Multiplication
- VHDL Code for 8 bit Floating Point Multiplication
P12_CRC
- VHDL code for CRC algorithm
VHDL程序
- 利用QuartusⅡ6.0对所设计的出租车计费器的VHDL代码进行仿真，并在FPGA数字实验系统上实现了该控制。(The Quartus II 6 is used to simulate the VHDL code of the designed taxi billing device, and the control is realized on the FPGA digital experiment system.)
Serial to parallel vhdl
- SERIAL TO PARALLEL VHDL CODE