搜索资源列表
XILINX
- In this module we prepare our students to familiar with XILINX ISE TOOL, which is used for Simulation, Synthesis and implementation on FPGA KIT.
UART
- xilinx官网提供的VHDL,UART串行通信模块，肯定好用，官方提供-xilinx official website provides VHDL, UART, FPGA communication module is certainly easy to use, official
Xilinx-Training-2010
- 赛灵思公司2010年培训技术文档，对FPGA的开发有很大的帮助-Xilinx 2010, training of technical documentation, development of the FPGA is very helpful
xilinx-timing-constrains
- ISE时序约束笔记——Global Timing Constraints，这个文档中详细介绍了如何使用ISE中约束工具和原理，对fpga水平提高有很大帮助-In this file , global timing constraints is introduced very clearly. It can really helps
testbench(xilinx)
- Testbench 不仅要产生激励也就是输入，还要验证响应也就是输出。当然也可以只产生 激励，然后通过波形窗口通过人工的方法去验证波形，这种方法只能适用于小规模的设计-The Testbench not only to generate incentives to input, verify that the response is output. Of course, can only produce Incentive, and then the waveform by the wa
Xilinx-FPGA-Matlab-Simulate
- 这是Matlab实现的非常简单的数字信号调制仿真，用于Xilinx FPGA（ASK, BPSK, FSK, OOK, QPSK）-Matlab is very simple simulation of digital signal modulation for Xilinx FPGAs (ASK, BPSK, FSK, OOK, QPSK)
Xilinx-Configuraon-Reference-
- 本应用笔记讨论的是Xilinx 的复杂可编程器件（CPLD）、现场可编程门阵列（FPGA）和PROM系列的配置和编程选项。它示意了每个系列的最常用的一些配置方法。-This application note of the discussion is the complex programmable device Xilinx (CPLD), field programmable gates array (FPGA) and PROM series of configuration and pro
ise11tut
- Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use inthe development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, downlo
fifo_config
- This the fifo made fot Xilinx, spartan 3-This is the fifo made fot Xilinx, spartan 3
Xilinx-Downloader
- 这是一个Xilinx并口下载线的图纸，可下载Xilinx的CPLD\FPGA,本人试制成功过，并在ISE12.1下载验证。-This is the drawing of a Xilinx parallel port download cable, downloadable Xilinx CPLD \ FPGA, I succeeded in the trial, and in ISE12.1 Download verification.
Xilinx-ISE
- 苏州大学的一部很不错的关于飞思卡尔汽车竞赛的编程语言设计介绍的书-this book is very good book written by professors in Suzhou University,which relates to the design of programing by c/c++.
xilinx
- This documentation of Xilinx course-This is documentation of Xilinx course
Xilinx-design-timing-constraints
- 很有用的Xilinx时序约束设计资料，很适合初学者-Very useful Xilinx timing constraints, design data, is very suitable for beginners
ZXS6M
- ZXS6M的XILINX FPGA开发板的全套资料，包括用户手册、电路原理图、实验手册、实验代码等，该电路板功能非常全，实验涵盖了所有Spartan6芯片的常用功能，对想熟悉XILINX的新手来说是非常好的学习资料-The full set of data ZXS6M XILINX FPGA development board, including user manuals, circuit schematics, lab manual, test code, etc., the circuit
xilinx
- 这是xilinx FPGA的学习ppt 里面详细讲解了具体操作及模块的编写方法-This is xilinx FPGA learning ppt which explain in detail the preparation method and module specific operations
Xilinx
- 使用Xilinx的FPGA开发教程，Xilinx平台主要支持VHDL和Verilog的编程和实现。-Using Xilinx FPGA development tutorial, Xilinx platform is mainly supported by the programming and implementation of VHDL and Verilog.
face-recogn.--in-xilinx-EDK
- it is a approach for implementing face recognition using xilinx EDK .
xapp800
- XAPP800SPICPLD源码参考设计-THIS DESIGN IS PROVIDED TO YOU AS IS . XILINX MAKES AND YOU RECEIVE NO WARRANTIES OR CONDITIONS, EXPRESS, IMPLIED, STATUTORY OR OTHERWISE, AND XILINX SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGE
Vivado 2016.1 安装流程
- Vivado是 Xilinx新一代针对7系列及后续 系列及后续 FPGA 的开发平台。 Vivado 2016.1是官方首个支持 是官方首个支持 win10的版本。(Vivado is the new generation of Xilinx for the 7 and subsequent series and subsequent FPGA development platform. Vivado 2016.1 is the official first support, is the of
vsmkq
- Particle image segmentation and matching subroutines themselves are prepared, Is the topic of the elementary school stage curriculum design, High-resolution array signal processing estimates.