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- 扫描显示译码控制部分用一个频率1KHz的信号扫描一个多路选择器,实现对六位已经锁存的计数结果的扫描输出-Scan revealed a decoding control part of the signal with a frequency of 1KHz scan more than one MUX to achieve a count of six has been the results of the scan latch output
c8051f020
- Cygnal C8051F系列单片机的功能部件包括模拟多路选择器可编程增益放大器ADCDAC电压比较器电压基准温度传感器SMBus/ I2CUARTSPI可编程计数器/定时器阵列PCA定时器数字I/O端口电源监视器看门狗定时器WDT和时钟振荡器等所有器件都有内置的FLASH存储器和256字节的内部RAM有些器件还可以访问外部数据存储器RAM即XRAM Cygnal C8051F系-Cygnal C8051F MCU' s features, including analog multi
multiwayselector
- 基于verilog硬件描述语言的多路选择器-Verilog hardware descr iption language based on multi-way selector
Desktop
- 用verilog HDL编写的多路选择器的代码,包括一部分延迟-Prepared using verilog HDL code MUX, including part of the delay
digital-frequency
- 数字频率计 采用Verilog语言编写,分为8个模块,分别是计数器,门控,分频,寄存器,多路选择,动态位选择,BCD译码模块-Digital frequency meter using Verilog language, divided into eight modules, namely, the counter, gated, frequency, register, multiplexer, Dynamic Choice, BCD decoding module
verilogcode
- Verilog语言实现的多路选择器和移位寄存器的源代码.-Verilog language implementation of MUX and the shift register the source code.
FPGAVerilogHDLcode.RAR
- 一些例程供参考,包括加法器,减法器,多路选择器-failed to translate
VerilogSourceCode
- 乘法器、除法器、多路选择器、编码器、BCD码转换、加法器、减法器、状态机、四位比较器、数码管、串口、跑马灯、电子钟-Multiplier, divider, multiplexer, encoder, BCD code converter, adder, subtractor, state machines, four more players, digital control, serial port, marquees, electronic clock
adder2
- 此源代码是基于Verilog语言的持续赋值方式定义的 2 选 1 多路选择器 、阻塞赋值方式定义的 2 选 1 多路选择器、非阻塞赋值、阻塞赋值、模为 60 的 BCD码加法计数器 、模为 60 的 BCD码加法计数器、BCD码—七段数码管显示译码器、用 casez 描述的数据选择器、隐含锁存器举例 ,特别是模为 60 的 BCD码加法计数器,这是我目前发现的最优源代码,应用于解码器领域。-This source code is based on the Verilog language def
xuanze4x1
- 基于VHDL语言 4选1 多路选择器 时钟48Mhz 功能4个输入只能有一个输出-Based on VHDL, 4 to 1 MUX clock 48Mhz features 4 inputs can be only one output
vhdL
- VHDL多路选择器 (使用case语句)-VHDL multiplexer (using case statement)
vhdl
- 用VHDL语言实现的多路选择器,分别有if、case等不同的方法-VHDL language with the multiplexer, respectively, if, case and other different ways
Multiplexer-Description
- 通过应用QUARTUSII开发软件对二选一多路选择器进行设计并运行结果-Software development through the application of QUARTUSII choose one of two multiplexer design and operation results
Multiplexer-Description2
- 通过应用QUARTUSII开发软件对 四选一多路选择器进行设计,并给出运行结果-Software development through the application of QUARTUSII choose one of four multiplexer design, and operating results are given
8xuanyi
- quartus 8选一 多路选择器 程序-8 choose a multiplexer process
AHB-Multiplexor-Module
- AMBA2.0版本AHB总线多路选择器设计方面的技术支持,参考ARM公司AMBA技术手册。对AHB多路选择器电路的接口、基本逻辑等方面进行介绍。-AHB_M2S_Multiplexor & AHB_S2M_Multiplexor
MUXK
- 双多2选1多路选择器,文件中工程与源程序都有,直接运行就可以了,你懂的-The assembly includes all required documents,and you can achieve full functionality,if you set up Quartus,you can enjoy it.
mux41
- 四选一多路选择器,功能是控制输出选择四个输入中的其中一个。-Four more than one way selector
MUX
- Quartus环境下多路选择器的编写代码,适合初学数字逻辑设计的进行学习-MUX in Quartus
Multi-decoder
- Quartus环境下多路选择器的编写代码,适合初学数字逻辑设计的进行学习-Multi-decoder in Quartus