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protelshzzh.rar
- 基于单片机的数字钟设计电路图,以及PCB仿真图。,MCU-based design of digital clock circuit, and PCB simulation Fig.
DE2.rar
- 使用 DE2板制作的多功能数字钟,含有选择功能,秒表,电子表,闹钟,用7-segment LED液晶显示,可以通过LCD看当时状态 附有仿真波形,-Clk_Div,- Mode_Select,-Watch,-stop_watch,-Lcd_Module,-Total_Out source code,Simulation waveform
eda.rar
- 使用VHDL语言编程,烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟,The use of VHDL language programming, burn in the chip to run the last 5 seconds short bell ring 4 final say sound a long tone of digital clock
CLOCK
- 文通过ALTERA公司的quartus II软件,用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为:计时功能,24小时制计时显示;通过七段数码管动态显示时间;校时设置功能,可分别设置时、分、秒;跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
1234
- 多功能数字钟,、在quartus 2环境中编译通过; 4、仿真通过并得到正确的波形; 5、给出相应的设计报告 -Multifunction digital clock, in the quartus 2 compiler environment through 4, simulation through and get the correct waveform 5, gives the design report
clock
- EDA 数字钟实现文件 能够实现计时,闹钟,校时功能 -EDA digital clock time to achieve the realization of paper, alarm clock, school functions
clk_vhdl
- Quartus II工程压缩文件,是一个典型的基于FPGA的数字钟工程项目,有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based digital clock project, there are sub-50MHz frequency, counting, decoding modules. Using VHDL language.
shuzizhong
- Verilog写成的数字钟 可以在ISE或者quartus环境下运行仿真-Verilog digital clock can be written in the ISE environment or running simulation quartus
123
- 运用汇编语言设计的数字钟,可以调节时间,并且显示在LED数码管上,-The use of assembly language designed digital clock, time can be adjusted and displayed on the LED digital tube, the
verilogclk
- Verilog HDL语言编写的多功能数字钟.-Verilog HDL language multi-function digital clock.
51shizizhong
- 以51单片机控制的lcd数字钟,包括调时,定时。并包括pretues的仿真图-To 51 single-chip control of the lcd digital clock, including the transfer, the timing. And includes pretues simulation diagram
拉等
- 遥控数字钟应用程序,应用于多种数字钟接口,可以遥控设备,省力。自制LED电子钟在很多电子报刊杂志上都可以见到,但大多数在断电后都要重新设置时间等 参数,给使用带来很多不便。也有用后备电池作为备用电源的,但往往体积较大。本文介绍 的LED电子钟克服了以往的弊端,而且采用了家电通用的红外遥控器进行控制,方便使用。 有一路闹铃输出,可以通过遥控器设置闹铃时间及允许与否。-digital clock remote control applications, digital clock used in a
pid 电子钟
- 这是一个pic编写的数字钟,希望对大家有用。由于能力有限,还有很多不足之处,愿和大家一起讨论进步。-This is a pic prepared by the digital clock, useful for all. Because of limited capacity, there are many shortcomings, and we would like to discuss progress.
EDA
- 数字钟的实现 FPGA上运行 VHDL编写-Digital clock running on the FPGA to achieve the preparation of VHDL
clock
- 很好的多功能数字钟的HDL代码不可多得的哦-Good multi-function digital clock of the HDL code rare Oh
shuzizhong
- 数字钟的解决方案 基于proteus的c代码 希望对你们受用-Digital clock solution is based on the Proteus of the c code you wish to benefit
CYJ
- 用万年历编数字钟,功能非常强大,已经成功运行-Digital clock with calendar series, very powerful, have successfully run
shuzizhong
- 多功能数字钟,带论文,大家分享和指点,希望对大家有帮助,-Multi-function digital clock with papers and advice to share with you, I hope all of you help,
shuzizhong
- 设计一个能进行时、分、秒计时的十二小时制或二十四小时制的数字钟,并具有定时与闹钟功能,能在设定的时间发出闹铃音,能非常方便地对小时、分钟和秒进行手动调节以校准时间,每逢整点,产生报时音报时。 实验平台: 1. 一台PC机; 2. MAX+PLUSII10.1。 Verilog HDL语言实现,还有完整的实验报告-The design of a can be hours, minutes, seconds time of 12 hours or 24 hours system, d
shuzizhong
- 可预置数字钟,用VHDL语言编写,LED显示,普通数字钟表。-Digital clock can be preset using VHDL language, LED display, an ordinary digital watch.