搜索资源列表
exp1_led
- 通过ALTER公司EP2C芯片实现4个灯交替闪烁 每个250ms-ALTER company EP2C chip through 4 lights flash alternately every 250ms
fft
- Alter官方FFT程序(使用Verilog编写)-Alter official FFT program (written using Verilog)
Operating-Systems---William-Stalling-6th-edition.
- Operating Systems: Internals and Design Principles is a comprehensive and unified introduction to operating systems. By using several innovative tools, Stallings makes it possible to understand critical core concepts that can be fundamentally challen
bizhang
- 实现小车的自动避障功能，当遇到障碍物是，自动改变路径，绕过以后，返回原路径前行-Realize the functions of the handicapped, when faced with obstacles, automatically alter path round, returns the path through
shujuluxiugai
- 这个是易语言源码，首先声明不懂易语言的不要下，毒软误报的问题不再解释，源码内容：数据库修改-This is an easy language source code, first of all do not understand the language, not poisonous, soft false problem will not explain, source: alter database
ALTERA
- develop and test their designs for this logical occupying the UP2 development platform to alter. Tutorial
Inition
- 程序能实现随机产生规定长度的实数数组，要得到不同大小的数组，只需要改变程序中的参数-Random generate an array whose length is seted,alter the parameter to get different arrays with different length.
shishishizhong
- 实时时钟的硬件控制原理及设计方法.学习和掌握S3C44B0X处理器的RTC模块的使用,并编写应用程序,修改时钟日期及时间的设置,并使用EMBEST ARM教学系统的串口,在超级终端显示当前系统时间. -Real time clock hardware control principle and design method.To learn and grasp the RTC S3C44B0X processor module use, and writing applications, alte
SQL-statements-Collection
- 下列语句部分是MsSql语句，不可以在access中使用。 SQL分类： DDL—数据定义语言(CREATE，ALTER，DROP，DECLARE) DML—数据操纵语言(SELECT，DELETE，UPDATE，INSERT) DCL—数据控制语言(GRANT，REVOKE，COMMIT，ROLLBACK) -The following statement is MsSql statement can not be used in access. SQ
VHDL
- 该源码包全面详细的描述了一个基于VHDL的抢答器设计运行于Alter公司的FPGA上-The source package detail an answer based on the VHDL designed to run on Alter FPGA
uart
- ARM的P0.0口接LED，串口接Proteus的虚拟终端。每隔一段时间改变一次LED的状态，并且在串口上输出LED的当前状态。-LED contact the port P0.0,and uart port contact the Proteus virture terminal . alter the LED state every a time,and output the curent state to the termial.
timer
- ARM的定时器实验，定时改变LED的状态。 -the arm timer ,alter the led state every some time.
system
- 管理系统内附完整程序,里面已经弄的非常仔细了,可以看一下 .-Remember what should be remembered, and forget what should be forgotten. Alter what is changeable, and accept what is mutable
news
- 新闻管理系统：实现用户阅读新闻，管理员添加、删除新闻等功能。-news system is used as a system ,which can alter news.
k10ctl
- K10CTL by ZTEX The main purpose of k10ctl is overclocking and / or "undervolting" the CPU and to configure Cool n Quiet settings. In particular It is intended for AMD Family 10h (aka K10) CPU s (e.g. Phenom, Phenom II) It runs under Linux
Expert-one-on-one-Oracle
- PL/SQL块中只能直接嵌入SELECT,DML(INSERT,UPDATE,DELETE)以及事务控制语句(COMMIT,ROLLBACK,SAVEPOINT),而不能直接嵌入DDL语句(CREATE,ALTER,DROP)和DCL语句(GRANT,REVOKE)-PL/SQL block can only be embedded directly in the SELECT, DML (INSERT, UPDATE, DELETE), and transaction control stat
counter
- 用4个T触发器组成16位的计数器，FPGA实验ALTER DE2开发板自带光盘的案例程序解析-Four T flip-flop 16 of the counter, the case of FPGA experiment ALTER DE2 development board comes with CD-ROM program parse
clocker-and-timer
- 时钟与计时器，FPGA实验alter DE2开发板自带光盘的案例教程编程解析-Clock and timer, FPGA experimental alter the DE2 development board comes with the CD case tutorial programming resolution
latches-
- 锁存器，FPGA实验alter DE2开发板自带光盘的案例教程编程解析-Latch, FPGA experimental alter the DE2 development board comes with the CD case tutorial programming resolution
Finite-State-Machines
- 状态机，FPGA实验alter DE2开发板自带光盘的案例教程编程解析-State machine FPGA experiments alter the DE2 development board comes with a CD case tutorial programming resolution