搜索资源列表
ARM9_instruction_cache_verilogCodes
- Arm9指令Cache缓存模块的verilog代码，对一些做ARM硬件开发的朋友有参考价值。-Arm9 Instruction Cache Cache Module Verilog code, do some of the hardware development of the ARM friends reference value.
amba_verilog
- IC设计相关，arm内的AMBA桥实现的源码，verilog语言实现，
arm9_fpga2_verilog
- arm9_fpga2_verilog是一个可以综合的用verilog写的arm9的ip软核，对学习arm和FPGA开发有帮助。
arm7_core_design
- arm7内核的verilog代码，可以综合，虽有几条指令没有实现，但已实现的功能对理解arm体系结构已足够
AMBA-Bus_Verilog_Model
- 该源码包是2.0版本的AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型，AHB总线上从设备RAM模型，参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_R
AD9910Driver
- DDS之AD9910驱动源码，控制器ARM ADuc7026.-DDS source of the AD9910 driver, controller ARM ADuc7026.
spi.tar
- This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
clock
- simple clock over verilog
BP062-BU-01000-r0p0-00rel0[1][1].tar
- AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!
ARM7
- 用verilog编写的ARM7内核代码，通过modelsim仿真-With verilog code written in ARM7 core, through the modelsim simulation
LCD12864_ST7920
- LCD12864驱动程序 可实现以ARM为CPU的LCD12864的驱动-LCD12864 driver enables ARM-CPU of LCD12864 drive
my_RAM
- pdf actel fpga verilog ram读写-pdf actel fpga verilog ram read and write
ARM-barrel-shifter
- 用verilog描述语言实现的桶形移位器。-Descr iption language with verilog barrel shifter.
ARM7_verilog
- ARM Verilog 源码 希望对大家有帮助-ARM Verilog source code, we hope to help! ! ! ! !
FPGA-auto-car-and-arm
- VHDL Verilog编写，实现无线串口通信遥控4自由度机械臂和车身行动驱动。串口命令格式和舵机参数可根据实际需要自行调整-Verilog VHDL prepared to achieve a wireless serial communication remote control 4 degrees of freedom manipulator and body action. Serial command format and actuator parameters can be adju
sys
- ARM m4 FPGA顶层模块，用于相应的FPGA开发(ARM M4 FPGA top-level module, for the corresponding FPGA development)
avalon-i2c
- 基于verilog的I2C实现，可以通过软核或者ARM核进行控制哦。(The implementation of I2C based on Verilog can be controlled by soft core or ARM core)
wARM
- 著名的wARM源代码，作者吴瑞祥，Verilog HDL源代码。(Famous wARM source code, author Wu Ruixiang Verilog, HDL source code.)
ARM_SOC
- ARM最小系统，vivado或ISE综合后下载至FPGA板子上可以做ARM用，包含连接在AHB总线上的RAM和ROM，ARM内核引出JTAG接口，可以连接调试器用keil-MDK进行调试！(ARM minimum system, vivado or ISE integrated download to the FPGA board can be used as ARM, including the RAM and ROM connected to the AHB bus, the ARM ker
arm m0
- arm m0官方工程。包含完整架构的verilog代码等。