搜索资源列表
fir_filter_50Mhz
- 基于并行分布式算法的高速Fir滤波器的设计代码，采用Verilog编写，压缩包为quartus II编译过的工程代码-Parallel and distributed algorithms based on a high-speed Fir filter design code, Verilog prepared, compressed package for the quartus II compiled project code
fir_lowpass
- 简易FIR低通滤波器的verilog代码-Simple FIR low-pass filter verilog code
FIR_FILTER
- FIR滤波器的verilog实现，包含testbench，以及设计文档，文档里面详细介绍了滤波器系数的求取-FIR filter verilog implementation, including testbench, and the design document, the document which details the filter coefficients to strike
FIR_dida
- 自己写的FIR滤波器设计，verilog语言写的，很好用-Write your own FIR filter design, verilog language, easy to use
FIRverilog
- 多种FIR滤波器的verilog语言实现 (数字信号处理的FPGA实现)-Verilog language variety FIR filter implementation (digital signal processing FPGA implementation)
16QAM
- 使用verilog编写的16QAM调制解调代码，可用于quartus和ISE，因为不包含FIR，只能用于仿真，不能用于实际通信-Verilog prepared using 16QAM modulation and demodulation code can be used quartus and ISE, because they do not contain FIR, only for simulation and not for actual communication
fir4btp
- 4tap FIR filter in verilog code
FILTER
- VERILOG CODE FOR 1D FIR FILTER IMPLIMENTATION -VERILOG CODE FOR 1D FIR FILTER IMPLIMENTATION
2D-FILTER
- VERILOG CODE FOR 2D FIR FILTER
fir_verilog_matlab
- 本设计是基于FPGA的一个FIR低通滤波器设计，要求使用Verilog语言编写滤波器模块，通过编译和综合，并通过Matlab和modelsim联合仿真验证设计结果。-This design is a FIR low-pass filter design based on FPGA, use Verilog to program filter module, and joint simulation by Matlab and modelsim to validate the design re
code
- 用Verilog写的采用LSM算法的自适应性FIR滤波器，有testbench和主体代码，亲测可用-Written using Verilog LSM algorithm using adaptive FIR filters, and the body has testbench code, pro-test available
fir16.v
- 16阶FIR滤波器设计的verilog代码-Verilog 16-order FIR filter
fir48
- 48阶FIR滤波器的verilog，包含测试文件-48-order FIR filter verilog, including test paper
20140825
- FPGA设计在设计过程中使用ISE软件自带的IP核时，消耗资源太大的时候，需要自己编写滤波器的源代码，这里给出我们常用的串行FIR核的verilog语言代码设计文件，并通过作者时序仿真验证，并用于实际的项目中。-The FPGA design in the design process of ISE software used to own the IP core, consume resources is too big, need to write your own source code
1
- verilog编写的11阶FIR数字滤波器-The 11 order FIR digital filter Verilog prepared!!!!!!!!!!!!!!!!!!!!!
8fir
- 这是一个verilog语言描述的8阶fir滤波器-8firFILTERdesign
FIR32
- 基于DA算法的FIR带通滤波器设计，应用于FPGA实现，verilog语言描述-DA algorithm based on FIR bandpass filter design, used in FPGA implementation, verilog language to describe
filter
- 大神写的FIR滤波器，verilog所写，短小精悍，易读懂！-Great God wrote the FIR filter, verilog written, short and pithy, easy to read!
firfilterverilog
- FIR FILTER DESIGNED IN VERILOG FOR 4 BIT MULTIPLIER
book3e
- 数字信号处理的FPGA实现随书光盘，包含大量Verilog代码，包括加法器，乘法器以及FIR滤波器设计，快速傅立叶变换-FPGA digital signal processing to achieve the CD with the book, contains a large amount of Verilog code, including the adder, multiplier and FIR filter design, fast Fu Liye transform