搜索资源列表
FFT16
- 基于FPGA的16点FFT快速傅立叶变换的Verilog源代码。-the FFT implement of Verilog based on FPGA
synth_fft_fpga
- 用fpga实现fft-achieve fft
vhdlsynth_fft
- FFT的VHDL源代码的实现与仿真结果，经过FPGA源型机验证，已通过-FFT VHDL source code and the realization of simulation results, after FPGA source aircraft certification, have passed
synth_fft
- 一个fpga实现fft的源码，实现序列的频域转化-fft source code, the sequence of achieving transformation frequency domain
20060510205455473
- vhdl设计事例,有助于FPGA初学着,High-Performance 1024-Point Complex FFT-vhdl design examples, to help novice FPGA. High-Performance 1024-Point Complex FFT
FFT_IP
- Xilinx FPGA 的IP核，实现FFT功能的-Xilinx FPGA IP core, FFT function
cf_fft_2048v
- 基于FPGA的2048点FFT的verilog实现的源代码。-FPGA-based 2048-point FFT verilog the source code.
FFT_arithmetic_analysis
- 介绍 FFT 基2/4 算法的演算过程,并以FPGA 实现的可行方案-on FFT-based 2 / 4 algorithm for the calculation process, and to FPGA options
FFT
- 基于FPGA的1024点fft实现VEILOG-1024 point fft based fpga
DIGITAL-SIGNAL-PROCESSING-WITH-FPGA
- 数字信号处理的FPGA实现最新版的源代码，涉及FFT变换、IIR、FIR数字滤波器等的verilog及vhdl代码-<digital signal processing with FPGA> (the latest version) . the source code involving FFT transform, IIR, FIR digital filters by verilog and vhdl.
fft512
- 基于verilog IP核的FFT工程，512位FFT运算，(FFT engineering based on Verilog IP kernel and 512 bit FFT operation,)
数字信号处理的FPGA实现-第三版-verilog源程序
- 数字信号处理的FPGA实现, 包括了FPGA基础知识，浮点运算，信号处理的FIR FFT等，附录包含源代码(Digital signal processing FPGA implementation, including the basic knowledge of FPGA, floating point operations, signal processing FIR, FFT, etc., the appendix contains the source code)
ctrl_fft
- fpga中fft ip 核 流模式控制程序，（状态机）(fft_crtl the control masine of fft in fpga)
fft fpga
- please copy this file very very good source code!!!!
DDS
- 用verilog语言，在fpga上实现dds信号发生器，并在vga上显示出来(Verilog realizes DDS Signal Generator)
chapter_listing
- Embedded SoPC Design with Nios II Processor and Verilog Examples
19_vga_test
- 基于fpga的vga显示，芯片：EP4CE6F17C8(Analysis and implementation of complex modulation ZOOM-FFT algorithm based on MATLAB)
exp_fft_test_724
- 在quartus软件中调用FFT的IP核，编辑IP核的驱动模块，使得IP核读入数据进行处理，输出数据。使用modelsim进行联合仿真。(In the quartus software, the IP kernel of FFT is called, and the driver module of the IP kernel is edited, so that the IP kernel is read into the data for processing and output data
fft_32k
- FFT 32K点设计实例v1.0.0自述文件 本自述文件包含以下部分： 工具要求 o Quartus II编译 o ModelSim仿真模型 o MATLAB模型(FFT 32K Point Design Example v1.0.0 README File This readme file for the Fast Fourier Transform (FFT) 32K Point Design contains information about the design exam
8815397fft
- 基于MATLAB/FPGA的fft的verilog实现。(Verilog implementation of FFT based on MATLAB/FPGA)