搜索资源列表
i2c
- 代码中是用于实现基于FPGA的I2C的通信实验，可移植性强-Code is used to implement the FPGA based I2C communication experiment, portability strong
I2C-code-Base-on--FPGA
- 该工程文件中代码是用于实现基于FPGA的I2C的通信实验，可移植性强-The project file code is used to implement an FPGA-based I2C communication experiment, the portability
I2C
- 基于FPGA的IIC IP硬核设计 连接UC系统，用VHDL语言书写
I2C
- FPGA的I2C源码，基于Altera QUartusII的开发环境。-I2C-source FPGA-based Altera QUartusII development environment.
i2c-master
- i2c 总线 host 控制器 ， fpga上验证过，可以实现i2c 通信。-verilog IP for i2c master controller
proyecto-I2C
- It s a VERILOG code to initiate a I2C protocol on an FPGA and an EEPROM of 512 KB
i2c
- fpga verilog IIC 已经调试通过-fpga verilog IIC
i2c_slave_model
- FPGA I2C i2c_slave_model code verilog
wb_master_model
- FPGA I2C主机FPGA代码 verilog-FPGA I2C host FPGA code verilog
i2c_master_controller
- Verilig语言描述的I2C Mater控制器的IP核，已经过实践应用，适合于FPGA I2C接口设计应用。本IP核在Altera QII 15.1软件环境下综合，并且包含基于NiosII Gen2处理器的i2c软件驱动代码。-Verilig language I2C Mater described controller IP core, has been the practical application, suitable for FPGA I2C interface design app
I2C
- fpga实现i2C通信程序,工程文件可以直接用ISE打开-FPGA implementation of i2C communication program
I2C
- I2C接口FPGA程序,在VIVADO平台实现，已在硬件验证-The I2C interface FPGA program, implementation, the VIVADO platform was validated in the hardware
I2c_v13
- FPGA的I2C模块实例代码，有说明文档，值得参考啦-FPGA I2C Model Sample Code Docs
USB-UART-SPI-I2C-IO-ADC-PWM
- uc/os operation system,which is used in FPGA nios ii.
IIC
- FPGA I2C的IP核控制，可以用modelsim直接仿真，观察信号。-IP core for I2C of FPGA,able to simulate with modelsim and check the signal
IIC_FPGA
- 通过DSP的IIC接口 与FPGA 通信(Communicate with fpga through IICinterface of DSP)
I2Csalve.v
- Modified I2C salve design 1. Asynchronous design: ASIC or FPGA design option 2. 8 bits CSR RW interface: 0~15, address and control 3. PAD not included 4. Altera CPLD verified
IIC
- 编写FPGA 的模拟I2C通信，用的是altera验证(The preparation of FPGA analog I2C communication, using Altera authentication)
i2c_24c64
- 基于verilog的i2c接口EEPROM 24lc64的测试程序，包括了eeprom的虚拟模型，实际在硬件上验证没问题，也可以通过modleism进行仿真(Verilog based I2C interface EEPROM 24lc64 testing procedures, including the virtual model of EEPROM, the actual hardware verification is no problem, you can also simulate
Desktop
- I2C,测试代码，经过验证调试与，这个测试代码发现是可用的(I2C, test code, verified debugging and, this test code discovery is available)