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sram控制器
- 基于nios ii 的sram控制器
div(FLP).rar
- 是Nios II處理器下客製化指令的一個32位元浮點數除法器，可將兩IEEE 754格式的值進行相除,Nios II processors are customized instruction under a 32-bit floating-point divider can be two format IEEE 754 value division
altera.rar
- 在调试nios ii时，由于软件或者是环境的改变造成原先建好的工程不能正常使用，提供一点解释希望能有所帮助,when debugging Nios ii, or because of software changes in the environment are caused by the original construction of the project should not normally use, to provide a little hope to be helpful to
DE0_SDCARD_JPEG_2_BMP
- 从SD Card中读取 image.jpg, 经过NIOS II 转成 image.bmp，并保存在SD Card中。 注: 运行程序之前,在SD Card的跟目录放一张名字为image.jpg的图片,并建立一个名为image.bmp的文件, 程序运行时,会把bmp图片数据写入image.bmp中-Read from the SD Card image.jpg, through the NIOS II converted image.bmp, and stored in the SD Car
DE2_SD_Card_Audio
- DE2板上读取SD卡，使用nios ii IDE开发环境，可以读取SD卡里面的任何文件系统。-Read SD Card based on the DE2 board,the environment is nios ii IDE
altera_avalon_spi
- Altera NIOS II SPI 驱动-Altera NIOS II uart DRIVER
sopc_led
- de2板上的led显示程序，最简单的nios测试程序，可以实现de2板上的两个小灯的闪烁，用quatus ii定置sopc系统！-de2 board led display program, the simplest nios test procedures can be achieved in two de2 board flashing lights, and quatus ii set sopc system!
VGA_Ctrl
- 基于NIOS II 的DE1开发板的VGA 控制器VGA控制模块主要控制VGA模块的开始和其运行的状态，需要写一个Avalon 从端口响应CPU的控制信号，继而控制整个模块的运行，-Based on the DE1 of the NIOS II development board VGA controller to control the VGA module VGA main control module and its operation began, and the need to wri
CLOCK
- 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
SDHC
- SD卡控制器驱动程序源代码，适合参考与开发，-sd host controll driver source code, used to ref and develop
Nios_II_timer
- 本源码为Nios II的开发示例,主要演示Nios II的定时中断器的应用。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II interrupt timing device applications. Development environment QuartusI
ILI9325
- ILI9325驱动，调试环境是NIOS II IDE-ILI9325 driver uesd on NIOS II
DE2_EP2C35
- EP2C35开发板官方原理图,是altera的官方资料。是fpga电路设计的很好参考典范。-EP2C35 official development board schematics, is altera of official information. Fpga circuit design is a good reference model.
c2h_fft_cyclone_ii
- 关于用c2h实现fft算法的源代码和说明书 altera-On C2H achieve fft algorithm using the source code and a detailed descr iption of altera
DE0_D5M
- 这是在DE0板上实现的用D5M+VGA的图像实时显示程序，完整工程-This is achieved in DE0 board D5M+ VGA images with real-time display program, complete project
tt_nios2_hardware_tutorial[1]
- It shows you how to use the Quartus® II software to create and process your own Nios II system design that interfaces with components on Nios development boards.
ug_nios2_custom_instruction
- Nios II Custom InstructionUserGuideNios II custom instructions are custom logic blocks adjacent to the ALU in the processor’s data path. -Nios II Custom InstructionUserGuideNios II custom instructions are custom logic blocks adjacent to the ALU in
Altera_Nios_II_Soft_Processor
- Introduction to the Altera Nios II Soft Processor