搜索资源列表
sopc_nios
- Altera公司推出的NIOS II处理器，非常有用，教程是初步教程
4_in_1
- 骏龙提供的最新quartus8.0的license，包括Quartus II 8.0，NIOS II 8.0（在Quartus II的license里面），DSP Builde 8.0，ModelSim-Altera 6.1g (Quartus II 8.0)，新Quartus II的license支持远程桌面访问的功能。
Altera
- 利用Nios Ⅱ软核处理器，以Altera公司的UP3开发板为硬件平台，以Quartus II、Quartus ID为软件开发平台，设计一个电子钟，实现下列系统功能： （1）在液晶屏上显示时间、日期、状态提示； （2）利用4个按键对时间（时分秒）、日期（年月日）进行设置； （3）利用一个LED灯指示当前设置状态；
61EDA_C1202
- Altera大学计划程序包，基于Nios II的源代码
altera_avalon_spi
- Altera NIOS II SPI 驱动-Altera NIOS II uart DRIVER
CLOCK
- 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
Altera_Nios_II_Soft_Processor
- Introduction to the Altera Nios II Soft Processor
tut_debug_software_verilogDE2
- This tutorial presents some basic concepts that can be helpful in debugging of application programs written in the Nios II assembly language, which run on Altera’s DE2 boards.
tut_nios2_introduction
- This tutorial presents an introduction to Altera’s Nios R II processor, which is a soft processor that can be in- stantiated on an Altera FPGA device. It describes the basic architecture of Nios II and its instruction set. The NiosII processor a
tt_nios_hardware_tutorial
- Altera NIOS II Hardware Tutorial
Avalon_uSequencer
- 用于控制Altera Avalon总线设备的一个微型的状态机，可以运行类似汇编语言的scr ipt，比Nios II CPU占用的资源少许多，可以生成明文的源代码-A tiny state machine used to control Altera Avalon bus devices. It can run scr ipt language similar to the assembly , occupied much less cells than the Nios II CPU res
GPS
- 基于NIOS驱动ALTERA DE1开发板的GPS模块工程-based on the nios ii drive the gpa module of altera de1 develop board,it s only a reference project
LCDPS2
- 基于nios ii 驱动altera de1开发板上的lcd和ps2鼠标模块工程-based on the nios ii drive the lcd and ps2 module of altera de1 develop board
cyclone3_handbook.pdf.tar
- cyclone3手册 altera的nios -cyclone3 handbook nios ii
Profiling_Nios_II_Systems
- Altera公司原版设计手册，nios ii ide profiling模式使用。-This application note describes a variety of ways to measure the performance of a Nios® II system with three tools: the GNU profiler, called nios2-elf-gprof, the timestamp interval timer component,
Nios_Embedded_Processor
- Altera公司原版设计手册，关于嵌入式nios ii 处理器-This manual provides comprehensive information about the Altera® Nios® 32-bit CPU. The terms Nios processor or Nios embedded processor are used when referring to the Altera soft core microprocessor in a
BmpDecoder
- 适用于Altera FPGA Nios II平台uClinux OpenCV之BmpDecoder的源码-Souce code of BmpDecoder for Altera FPGA Nios II uClinux OpenCV
hello_world_multi
- altera NiosII multicores hello_world_multi.c-altera nios ii
seg_7
- Altera DE系列开发板都可以参考的基于Nios ii 的数码管控制显示0-f程序-display 0-f with 7-segment display on Altera DE series board.