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crack-81
- 最新QuartusII8.1的补丁，安装它的破解器，可以获得长期使用权-QuartusII8.1 the latest patch, install it to break, and access to long-term use rights
Ethernet_Accel_Design
- altera官方以太网例程（基于niosII）-Accelerating Nios II Ethernet Applications User Guide
DE2_SD_Card_Audio(quartus-9.0)
- 本代码为Altera DE2开发板例程源码（EP2C35F672C6)，quartus II 9.0以上版本均可编译（随板光盘为quartus II 7.2版在9.0以上版本上编译会报错）。本工程实现SD的音频播放器，即通过FPGA控制SD卡，读取SD的音频文件，通过WM8731进行播放。-In this demonstration we show how to implement an SD Card Music Player on the DE2 board, in which th
FFT
- 基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核,实现了基于FFT的音频信号分析-Altera Cyclone II FPGA family based embedded high-performance embedded IP core (Nios) soft core processor to achieve a FFT-based audio signal analysis
NiosII_I2C_bus
- 采用altera公司EP3C系列芯片实现的基于Nios II的I2C总线设计，采用Verilog编码-Altera company EP3C using the Nios II series chip I2C bus-based design using Verilog coding
NiosII_SPI_bus
- 采用altera公司EP3C系列芯片实现的基于Nios II的SPI总线设计，采用Verilog编码-Altera company EP3C using the Nios II series chip SPI bus-based design, using Verilog coding
I2c
- 单片机可用的I2C接口代码，已在altera Nios II验证通过-I2C interface code, has been verified in the NiosII Altera
TFT-LCD
- 基于Nios+II的LCD驱动IP核的设计,IP核altera tft lcd controller -Design of the Nios+II driver IP core based on LCD, IP core TFT LCD controller Altera
vga_test
- 基于nios的vga控制器,分辨率及显示区域,显示位数,显存深度可调整,已经在altera cyclone ii条件下测试通过 quartus13.0开发环境 主机端符合avalon标准-VGA controller based on NIOS, resolution and display area show the median, the memory depth can be adjusted, has been in Altera cyclone II under the conditi
zhonghuanAGVpro
- 采用ALTERA FPGA，nios ii内核的AGV控制程序，里面包含了PID算法及相关AGV控制逻辑-Using ALTERA FPGA, nios ii kernel AGV control program, which includes a PID algorithm and control logic associated AGV
adda_spi
- 这个源码是用altera公司的开发工具NIOS II IDE开发的基于软核处理器的AD、DA控制程序， 通过spi 核控制AD、DA的时序，实现正弦波发送和接收。-this source is altera company development tools NIOS II IDE- based soft-core Office JIMMY of AD and DA control procedures, spi nuclear control AD and DA timetab