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ADC0809VHDL
- 8.4 ADC0809 VHDL控制程序 见随书所附光盘中文件:ADC0809VHDL程序与仿真。 --文件名:ADC0809.vhd --功能:基于VHDL语言,实现对ADC0809简单控制 --说明:ADC0809没有内部时钟,需外接10KHz~1290Hz的时钟信号,这里由FPGA的系 --统时钟(50MHz)经256分频得到clk1(195KHz)作为ADC0809转换工作时钟。 --最后修改日期:2004.3.20 -8.4 ADC0809 VHDL con
LEDVHDL
- 8.2 LED控制VHDL程序与仿真 本节分别介绍采用FPGA对LED进行静态和动态显示的数字时钟控制程序。 1. 例1:FPGA驱动LED静态显示 --文件名:decoder.vhd。 --功能:译码输出模块,LED为共阳接法。 --最后修改日期:2004.3.24。 -8.2 LED control and simulation of VHDL procedures introduced in this section of the LED using FPGA st
TLC5510VHDL
- 8.5 TLC5510 VHDL控制程序 见随书所附光盘中文件:TLC5510VHDL程序与仿真。 --文件名:TLC5510.vhd --功能:基于VHDL语言,实现对高速A/D器件TLC5510控制 --最后修改日期:2004.3.20 -8.5 TLC5510 VHDL control procedures, see the book with accompanying CD-ROM in the file: TLC5510VHDL procedures and sim
TLC7524
- 8.7 TLC7524接口电路程序 见随书所附光盘中文件:TLC7524VHDL程序与仿真。 --文件名:TLC7524.VHD --功能:产生156.25KHz的正弦波。 --最后修改日期:2004.3.18。 -8.7 TLC7524 interface circuit procedures see accompanying CD-ROM with the book files: TLC7524VHDL and simulation procedures.- File N
pci32_top_pci32_v4_8.vhd
- XINLINX的PCI核源文件代码,这是我在网上找的,希望对大家有用!-THE SOURCE FILE OF PCI CORE,IT IS FOUND ON INTERNET. MAYBE IT IS USEFUL.
dianti.vhd
- 电梯控制器的VHDL源程序 很有代表性 经简单修改后可用于n层控制 -Lift Controller
DAC0832
- 文件名:DAC0832.VHD 功能:产生频率为762.9Hz的锯齿波。 -File Name: DAC0832.VHD Function: generate the sawtooth frequency of 762.9Hz.
LED
- 文件名:decoder.vhd。 功能:译码输出模块,LED为共阳接法。 -File Name: decoder.vhd. Function: decoder output module, LED access method for a total of Yang.
TLC5510
- 文件名:TLC5510.vhd 功能:基于VHDL语言,实现对高速A/D器件TLC5510控制 -File Name: TLC5510.vhd features: Based on the VHDL language, to achieve high-speed A/D control devices TLC5510
64_TLC
- 交通灯控制器 请注意: 本例的各个源描述的编译顺序应该是: 64_tlc.vhd 64_test_vector.vhd-Traffic Light Controller Please note: This case is described in various sources to compile the order should be: 64_tlc.vhd 64_test_vector.vhd
52_divider
- 多倍(次)分频器 请注意: 本例的各个源描述的编译顺序应该是: 52_divider.vhd 52_divider_stim.vhd-Times (times) divider Please note: This case is described in various sources to compile the order should be: 52_divider.vhd 52_divider_stim.vhd
55_falsepath
- 地址计数器 请注意: 本例的各个源描述的编译顺序应该是: 55_falsepath.vhd 55_falsepath_stim.vhd-Address counter Please note: This case is described in various sources to compile the order should be: 55_falsepath.vhd 55_falsepath_stim.vhd
fft_gen
- FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results. here is what I do: 1- from core generator I choose fft core and create .vhd & .vho &
Crc_Parallel
- CCITT Parallel CRC 16-bit
ps2.vhd
- vhdl ps2 interface for practical use. please send me a response.
booth_multiplier.vhd
- 这个程序实现了定点整数补码一位乘法运算器-booth_multiplier
FINAL_OUT.VHD
- this is a vhdl program to test your LCD
dianziqin
- 这个程序是利用Quartus II编写的利用数控分频器设计硬件电子琴,主系统由3个模块组成,顶层设计文件内部有三个功能模块:SPEAKER.VHD 和TONE.VHD和NoteTabs.vhd。模块TONE是音阶发生器,模块SPEAKER中的主要电路是一个数控分频器,NOTETABS模块用于产生节拍控制和音阶选择信号。-This program is the use of Quartus II design prepared by the use of CNC divider hardware
sqrt
- This zip file contains the verilog source code for square root calculation and its test bench
vhd
- vhdl课件,基础教程,简单入门,适合初学者学习- useful