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caijing
- 这个是加密U盘的VHDL的源程序兼教学辅导，很具有实用性-U disk that is encrypted VHDL source program and coaching, it is practical
mini_aes_latest.tar
- mini_aes加密算法的vhdl实现,带有简易PDF介绍-mini_aes encryption algorithm vhdl implementation, introduced with a simple PDF
RBBaasicRSAS
- RSA加密算法的VHDL实实现，通过实际FPGA验证。 -The VHDL implementation of the RSA encryption algorithm to achieve, to verify the actual FPGA.
DES
- 一种基于VHDL的DES加密实现方法，经过实际验证可以运行-A VHDL-based DES encryption method, you can run after the actual verification
AESbyHGY_128
- VHDL描述AES加密系统。加密十次。与完成并可以成功仿真。-VHDL descr iption AES encryption systems. Encryption ten times. And complete and can be successfully simulated.
aes_pipe
- 流水线AES加密VHDL代码，代码规范，值得参考- The VHDL code of Pipelined AES encryption
sm4
- VHDL实现国家SM4加密算法（ECB）模式-VHDL to achieve national SM4 encryption algorithm (ECB) mode
4_coded_lock
- 本代码实现电子密码锁功能，用的是VHDL语言。可以方便和 可靠实现加密解密的过程。-The code to achieve the electronic password lock function, using the VHDL language. The process can be convenient and reliable implementation of encryption and decryption.
DES-S
- des加密算法在MATLAB中，通过VHDL语言的实现-des encryption algorithm in MATLAB, through the realization of VHDL language
rsa_512_latest.tar
- 利用VHDL实现的RSA512位加密算法，-Use VHDL to achieve RSA512 bit encryption algorithm
EasyFPGA060_Routine_AESEncrypt
- VHDL easyfpga060开发板 加密实验(Encryption experimental)
tb_des_loop
- des——top加密vhdl模块，顶层设计接口用于docsis3.0加密(Des - Top encryption VHDL module, top-level design interface for docsis3.0 encryption)