搜索资源列表
szz
- 该文件是用VHDL变成实现的数字钟程序，请指教！-The document is a VHDL implementation of the digital clock into the procedure, please advise!
digtal
- 时、分、秒、实现数字钟的基本VHDL源代码。-Digital clock basic VHDL source code.
shi
- 数字钟的VHDL源程序，可以实现校时，校分等功能，并在试验箱上运行成功-The VHDL source code digital clock, you can achieve at school, school grade features, and success in the chamber is running on
clock
- 用VHDL开发的数字钟资料 完整的实验代码-Developed using VHDL digital clock Experimental data integrity code
digital_clock
- 数字钟vhdl程序，能够显示年月日，时分秒，还有闰年-digital_clock.It can show the year,month,day and so on.
shuizhongvhdl
- 这时一个数字钟的VHDL程序，有计时、校时、整点报时功能，很适合做EDA设计之用-When a digital clock in VHDL procedures, time, school hours, the whole point timekeeping function, it is suitable for use in EDA Design
shuzizhong2008
- 这时一个关于数字钟的VHDL程序，有计时、校时、报时等功能-When a digital clock on the VHDL program, there is time, school time, timer and other functions
clock
- 基于vhdl的数字钟,分别由6个数码管显示24小时、60分钟、60秒的计数显示；设有校时、校分、秒清零校正功能，分别由3个按键控制；验证可用。-On vhdl digital clock, respectively, by 6 digital tube display 24 hours, 60 minutes, 60 seconds of the count display with school hours, school hours, seconds, cleared correction
vsz
- 这是一段数字钟的VHDL程序，简单易行。具有闹钟功能 ，适用于初学者。-This is a digital clock in VHDL process, simple and easy. With the alarm clock function, for beginners.
digitalclock
- 数字钟的VHDL设计 具有整点报时、闹钟等功能 -VHDL design of digital clock the whole point timekeeping, alarm clock and other functions
CANDY1
- 用VHDL实现的数字钟，实现消抖，计时，显示分秒，秒表等功能-VHDL implementation with digital clock and realize elimination shake, timing, displays minutes and seconds, stopwatch functions
VHDLshili
- 此内容为VHDL设计实例 一共有三个都是关于数字钟的功能要求的 但是没有说明 能看懂就行-The contents of VHDL design examples are a total of three functional requirements on the digital clock in but did not say can read on-line
digitclock
- 用vhdl实现的数字钟，具有整点报时，调时功能。-Implemented using vhdl digital clock, with the whole point timekeeping, transfer-time functionality.
shuzizhong_vhdl
- 用vhdl语言写的数字钟程序，有兴趣的可以-Vhdl language used to write the digital clock program, interested to see
exp5_clock
- VHDL语言编写的数字钟 具有清零、暂停、调整时间等功能-VHDL language of the digital clock has a clear, pause, adjust the time function
clock
- 数字钟VHDL源程序，有仿真图，源代码-VHDL digital clock source, there are simulation plans, source code, etc.
clock
- 数字钟 用VHDL 编写，内含QUARTUSII软件-digital clock
LIBRARY
- 基于VHDL的数字钟的设计，能够显示年月日，时分秒等功能。-VHDL-based digital clock designed to display years on, when minutes and seconds functions
VerilogHDL
- vhdl多功能数字钟数字钟是一种用数字电路技术实现时、分、秒计时的装置，与机械式时钟相比具有更高的准确性和直观性-vhdl multifunction digital clock digital clock is a digital circuit technology with the hours, minutes, seconds, timing devices, and mechanical clock higher than the accuracy and intuitive
VHDLdigitalclocktimer.
- 用VHDL语言编写的数字钟程序，可以实现计时功能，且具有整点报时功能，能够实现时、分、秒的十进制显示。-With VHDL language，it can realize the function of digital clock timer.