搜索资源列表
ahb2ahb.rar
- AMBA总线AHB TO AHB bridge,AMBA bus AHB TO AHB bridge
tb_ahb_master.rar
- this is a AMBA AHB code for master.,this is a AMBA AHB code for master.
CODE.rar
- AHB总线下的slave ram的verilog代码,AHB bus slave ram verilog
AMBA-Bus_Verilog_Model
- 该源码包是2.0版本的AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型，AHB总线上从设备RAM模型，参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_R
dma_ahb_latest.tar
- this shows the ip code for dma controller of amba ahb in vhdl.
appnote65_quickmips_ahb_interface_design_example.r
- appnote65_quickmips_ahb_interface_design_example AHB接口设计-appnote65_quickmips_ahb_interface_design_exampleAHB Interface Design
ahb2wishbone_latest.tar
- opencore ahb to wishbone bus verilog code
camera_up
- Camera Interface模块是视频输入转换存储模块。该模块一端接通用的video camera设备，另一端接AHB总线。实现了将Camera捕捉到的数据进行转换、并通过DMA存储到memory中。该IP支持ITU-R BT 601/656 8-bit 模式。支持YCbCr, RGB格式输入。可以将camera产生的YCbCr信号转换成24bit RGB 信号，然后下采样生成16bit RGB 5：6：5的LCD能直接读取显示的数据。该设备支持图像的镜像和翻转，以便适应手持式设备在移动环境
ahb_master1
- this is a code of AMBA AHB master protocol in verilog
AHB
- 基于混合优先权算法的AHB总线仲裁器的设计-Hybrid algorithm based on priority AHB bus arbiter design
AHB
- AMBA - AHB MASTER VERILOG CODE (UNCHECKED)
tegra-ahb
- Tegra AHB driver for Linux v2.13.6.
ahb_system_generator_latest.tar
- ahb system generator
AHB
- AHB_Verificaion_Code
ahb2apb-master
- ahb to apb master and slave
ahb2apb_bridge_verification-master
- ahb to apb master verification
AHB RAM
- Verilog写的 AHB总线接口的SRAM代码，带Testbench。(Verilog wrote AHB bus interface SRAM code with Testbench.)
ahb
- verilog实现AHB总线上的主从控制，在fpga上验证通过(Verilog realizes master slave control on AHB bus and verifies it on FPGA)
AHB2-master
- AMBA AHB 2.0 VIP in SystemVerilog UVM
基于ahb总线的sramc设计与验证（SV，uvm）
- 基于ahb总线的sramc设计与验证（E课网）