搜索资源列表
Sparc_leon_VHDL
- 一个航天航空用的Sparc处理器（配美国欧洲宇航局用的R_tems嵌入式操作系统）的VHDL源代码，但不能保证版图设计ASIC成功 -the Sparc processor (fitted with the United States of the European Space Agency R_tems Embedded operating system) VHDL source code, but it can not guarantee success ASIC Layout
VHDL_100Examples
- 北京里工大学ASIC设计研究所的100个 VHDL程序设计例子-Beijing University Institute of ASIC design hundred examples of VHDL Design
quartusii
- 推荐!!!!!学ASIC相当不错的教程!!!!还是可以看看的-recommended !!!!! school ASIC fairly good tutorial! ! ! ! Or can see!
EdgeCounterSobel
- 基于ti dsp图象处理专用芯片dm642上的sobel边缘检测算法,通过仿真器调试成功,保证能用-ti dsp-based image processing ASIC dm642 the pixel edge detection algorithm simulation to debug the success of guarantee can use
avr_core2_VHDL
- avr core verilog for asic design
source_verilog
- verilog shi 实现的加法器（8位）适用于初学asic -Verilog realized Adder (8) applies to beginners blends
sdsdfsdfsf
- 设计的PC. ·值得一看，对于网络管理. ·北京里工大学ASIC设计研. -design of the PC. An eye-catcher for network management. Li Beijing University ASIC Design Institute.
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- 假定穷举法攻击有效的话，那么即使设计一种每秒种可以试验10亿个密钥的专用芯片，并将10亿片这样的芯片用于此项工作， 仍需1013年才能解决问题；另一方面，若用1024片这样的芯片，有可能在一天内找到密钥，不过人们还无法找到足够的硅原子来 制造这样一台机器。 -assumed exhaustive law effective attack, then even the design of a second species can test one billion Key ASIC, a
ASIC_TFT
- 彩色TFT液晶显示控制电路设计及其ASIC实现-color TFT LCD control circuit design and ASIC implementation
wbm
- 用walsh算法实现的符号数乘法器,asic流片时,可以不用公司的付费乘法器的ip core.-algorithm using the symbols multiplier, HDL-piece quantities. it is not necessary for the company's paid Multiplier ip core.
taxiwork
- 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计，并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分，整个自动控制系统由四个模块构成：秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能，其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠，应用于实际当中有较好的实用价值和较高的可行性
hongwaigooog
- 单片机红外遥控最全的资料，包含很多当前电视遥控专用芯片的解码方式，C语言和汇编语言编写的解码范例程序，看完了你就会了！-infrared remote control MCU most complete information, including many current television remote control decoder ASIC, C and Assembly Language prepared by the example of decoding procedures w
USB2I2C_DEMO
- USB2I2C usb总线转i2c总线的专用芯片，无需固件编程。I2C接口支持4种不同时钟传输速度：100KHz/400KHz/750KHz。-USB2I2C usb bus to the bus i2c ASIC, firmware without programming. I2C interface supports four different clock speeds : 100KHz/400KHz/750KHz.
systemchipmicrocompute
- 摘 要:目的分析一般单片机变频调速系统的特点，通过引入专用芯片SA4828改善控制性能。方法通过单片机与SA4828芯片相结合实现对交流异步机的变频调速，给出了硬件电路和软件设计流程。结果系统充分发挥了SA4828的自身特性，分担了部分控制工作，减轻了单片机的任务，单片机可余出机时备作它用，同时系统可靠性增加。结论相对于单纯的单片机控制变频调速系统，引入SA4828的系统控制效果更好。 -Abstract : analysis of the general purpose microcont
2006620165231JoY5pZfmvSPHMBQVNp3V
- vhdl语言例程100个，专用集成电路（ASIC）设计-vhdl language routines 100, application specific integrated circuit (ASIC) design
RedirectSource
- This control makes it possible to redirect the stdin/stdout of a console-application to your program. It s even possible to redirect MS-DOS commands to your application. I ve written this project in Visual C++ 6.0 with ATL 3.0, because you can t use
usb_verilog.tar
- 文件包含一个usb 专用集成电路设计项目，用的verilog 原码-document contains a usb ASIC design, the original code verilog
project_asic.tar
- MP3解码的ASIC全部过程，含c和vhdl-MP3 decoder ASIC whole process, with c and vhdl
mc8051V1.4
- 8051硬核源码（VHDL），具有全部VHDL代码、测试环境以及说明文档、综合脚本等完整的开发、验证环境，源代码通过ASIC投片，并得到不断完善-8,051 hard-core source code (VHDL), with all VHDL code, testing and documentation, environment, Comprehensive integrity of the scr ipt, such as development, certification, the s
01_GettingStarted
- This getting started exercise will guide you through the step-by-step process of transforming a MATLAB floating-point model into a hardware module that can be implemented in silicon (FPGA or ASIC). The design is a general purpose FIR filter taken fro