搜索资源列表
finish812
- 会展条码票务管理、门禁、印刷、现场制证（摄像、登记、印刷）、总控中心、接待管理、展位管理，收费管理等。QQ：32810985-Exhibition barcode ticketing management, Access Control, printing, on-site certification system (camera, registration, printing), the total control center, hospitality management, booth m
用VHDL实现布斯算法
- 这个例子是讲述用VHDL实现布斯算法，应该有点用，是我的研究生师哥给我的。-this case is about the use of VHDL Booth algorithm, should use a bit of my graduate students Shige to me.
booth_mul
- 一种可以完成16位有符号／无符号二进制数乘法的乘法器。该乘法器采用了改进的Booth算法，简化了部分积的符号扩展，采用Wallace树和超前进位加法器来进一步提高电路的运算速度。本乘法器可以作为嵌入式CPU内核的乘法单元，整个设计用VHDL语言实现。-a 16 to be completed with symbols / unsigned multiplication of the number of binary multipliers. The multiplier used to impr
Booth_Multiplier
- 布斯乘法器的VHDL程序,下載後直接解壓縮複製貼上到你的EDATOOL就可以.-Booth multiplier VHDL procedures downloaded directly extract copy affixed to the EDATOOL you can.
b30core
- asm.rar 拉斯维加丝盘源代码 ASM51-asm.rar booth 21001-source Calling
BoothMultiplier
- -- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k-bit Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthe
Lab20
- the booth algorithm to implement the 32bits multiplication.-the booth algorithm to implement the 32bit 's multiplication.
booth
- 简易明了的booth算法乘法器，实现4x4的快速乘法计算；-Simple and straightforward booth multiplier algorithm to achieve the 4x4 multiplication
booth
- 32*32 Booth multiplier
booth-multiplier
- 布斯乘法器设计源码。。功能完善，modelsim仿真通过-Booth Multiplier source. . Perfect function, modelsim simulation through
booth
- booth算法的乘法器设置及实现，使用VHDL语言编写-booth algorithm multiplier setting and implementation using VHDL language
booth.tar
- Booth algorithm multiplier this project design booth multiplier by verilog language. you can open it by ISE and simulate.
lab3
- booth算法移位乘 使用verilog(Booth algorithm shift multiply Verilog)
code
- Due to its high modularity and carry-free addition, a redundant binary (RB) representation can be used when designing high performance multipliers. The conventional RB multiplier requires an additional RB partial product (RBPP) row, because an err
Lab4
- 布斯(Booth)乘法器是一種透過編碼後再運算所得到較佳效能乘法器 請嘗試描述說明 1. 布斯乘法器原理 2. 布斯乘法器組成架構 3. 並嘗試完成布斯乘法器(The Booth multiplier is a better performance multiplier that is encoded and then computed Please try to describe the descr iption 1. Booth multiplier principle Boo
multi_booth
- booth乘法器,实现普通booth乘法算法(Booth multiplier to implement the common Booth multiplication algorithm)
modified_booth_multiplier
- quartus ii项目文件包，功能是改进的booth乘法器，节省时钟，已完成仿真。(This zip file contains a quartus ii project, which can fufill multiple function. It is done by using a modified booth multiplier.)
Minor-1
- code for "booth multiplier" using verilog
ALU32
- 采用booth算法，实现了32位的ALU。(The 32 bit ALU is realized by using the Booth algorithm.)
multiplier
- Booth乘法器是属于位操作乘法器，采用流水线结构实现(The Booth multiplier is a bit-operated multiplier that is implemented in a pipeline structure.)