搜索资源列表
ddccitool-20081210
- 显示器通讯操作，可实现私有数据、控制字、字、EDID\DDC-CI的操作-Display communications operations, private data can be achieved, control characters, words, EDIDDDC-CI operation
ddc
- 数字下变频，vhdl代码，包含CIC和HF滤波-vhdl
DDC_polyphase
- 自己编写的数字接收机程序，多相信道化接收机MATLAB程序，DDC程序-An DDC program by myself
ddccontrol
- 该程序是由linux 版本的ddc控制程序直接移植到windows上的。当前程序现只支持ati显卡，geforce显卡没搞定，其他集成显卡没有添加进去。开发环境：vc6.0+gtk(网上有可与vc直接关联的 gtk程序包).-The program is a linux version of ddc control procedures directly transplanted into the windows. Current procedures are only supported at
DDC
- 用6阶CIC实现，加噪声仿真。序内加详尽注释。-6 bands CIC realized, plus noise simulation. Sequence with a detailed note.
ddc_simulate_short
- matlab编制的短脉冲ddc程序,希望对大家有帮助！-matlab prepared short pulse ddc procedures, we would like to help!
cic_M
- CIC filter setup, this is special used for the DDC
I2CCMD
- 通过VESA BIOS Extension(VBE)/Serial Control Interface(SCI)操作DDC读取显示器的EDID数据，或扩展硬件控制。-Read monitor EDID data from VESA BIOS Extension(VBE)/Serial Control Interface(SCI), or expand it for hardware control.
RealizationofdigitaldownconversionbyFPGA
- 介绍在FPGA 器件上如何实现单通道数字下变频（DDC）系统。利用编写VHDL 程序和调用部分IP 核相结合的方法研究了数字下变频的FPGA 实现方法,并且完成了其主要模块的仿真和调试,并进行初步系统级验证。-Introduced in the FPGA device on how to achieve the single-channel digital down conversion (DDC) system. VHDL procedures and the use of the prepa
FPGA-DDC
- 基于FPGA的直接数字频率合成器的设计和实现。-FPGA-Based Direct Digital Frequency Synthesizer Design and Implementation.
dspddc_R12p1
- 基于DSPbuilder搭建的DDC，里面包括CIC滤波器，FIR低通滤波器，HB半带滤波器，NCO等，实现了GC5016芯片的功能-DSPbuilder erected based on DDC, which include the CIC filter, FIR low-pass filter, HB half-band filter, NCO, etc. to achieve the function of the GC5016 chip
DDC_Ver1.0
- 数字下变频（DDC）在如今基于软件无线电的架构中对系统的整体性能决定性的影响，代码为基于Matlab的4通道DDC程序，程序中可以根据需要调节滤波器等参数评估DDC的性能对于使用FPGA实现DDC有较大的参考价值-Digital down conversion (DDC) in today' s architecture based on software radio system a decisive impact on the overall performance of the code
freqconv
- In digital signal processing, a digital down-converter (DDC) converts a digitized real signal centered at an intermediate frequency (IF) to a basebanded complex signal centered at zero frequency. In addition to downconversion, DDC’s typically decimat
Wideband_DDC
- 宽带DDC的Verilog程序，及其MATLAB仿真程序看结果，最大可达100M带宽，程序中用的是50M-Wideband DDC' s Verilog program, and MATLAB simulation program to see the results, the maximum bandwidth of up to 100M, the program used is 50M
gsm_ddc
- 8载gsm ddc实例 matlab实例 -8gsm ddc
reference_ddc_reset_virtex5_v1
- wcdma 3载 ddc 对应921c文档-xapp921c， ddc wcdma
cdma2k_ddc_12_1
- matlab simulink 开发的CDMA2K DDC数字下变频器和滤波器，使用XILINX FPGA V5系列，并包含DDC每个阶段的输出验证matlab程序，非常实用。-matlab simulink developed CDMA2K DDC digital down converter and filter, using the XILINX FPGA V5 series, and contains the output of each stage of verification DD
XILINXPDDC_DUC
- DDC和DUC文档，介绍内容，不是代码文件，介绍的内容还可以-DDC and DUC document that describes the content, not code files, the contents can also be introduced
DDC
- 文介绍了数字下变频的组成结构，并通过一个具体的实例，给出了FPGA实现的具体过程。-Paper describes the digital down conversion of the structure, and through a specific example, given the specific FPGA implementation process.
ddc_5247
- its a ddc cerilog file