搜索资源列表
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Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1
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MATLAB程序的仿真比较。随后，针对QPsK，详细讨论了其基本原理和具体的实现算法，并进行了仿真验证，然后选用HSP502巧数字上变频芯片和HSP50214B数字下变频芯片，设计了数字调制、解调器的实现方案。最后，作为对整个数字视频图像传输系统的宏观认识，利用M户JLAB中的实时建模仿真Simullnk库对典型的视频图像传输系统一数字视频广播系统(D vB)，进行了建模、仿真和初步的分析，结果表明:在高斯白噪声的传输环境下，系统采取的一系列抗干扰措施，包括内、外码级联的信道纠错编码和先进的调制
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FPGA实现数字下变频，仅供大家参考，希望有用。,Use FPGAto achieve digital down-convertion.For your reference, I hope it can be useful for you
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用matlab实现了数字阵列信号处理中的数字下变频技术（DDC）-Using matlab to achieve an array of digital signal processing technology, digital down-conversion (DDC)
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verilog语言实现的数字下变频设计。
在ALTERA的QUARTUS ii下实现。实用，好用。,Verilog language implementation of the digital down-conversion design. ALTERA at the implementation of QUARTUS ii. Practical, easy to use.
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DDC仿真模型，利用systemgenerator实现数字下变频-DDC simulation model, the use of digital down-conversion systemgenerator
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数字上下变频FPGA设计的详细介绍资料，还是中文的。很舍不得上传的哦。-FPGA digital down conversion design detailed information, or Chinese. Oh, very reluctant to upload.
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用MATLAB仿真的数字下变频程序，变频，滤波未用matlab函数，而是用代码完成，便于移到DSP或FPGA上。供参考。-Using MATLAB simulation of digital down conversion process, conversion, filtering is not used matlab functions, but with code completion, easier to move on a DSP or FPGA. For reference.
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中频70M，30M带宽LFM信号，采样率为102.4M，数字下变频后，还进行了三倍抽取，最后还得到I，Q两路信号
-IF 70M, 30M bandwidth LFM signal, the sampling rate of 102.4M, digital down conversion, the samples were carried out three times, the last also I, Q two-way signal
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简要介绍了数字下变频的设计，通过采用xilinx的ise软件，ipcore的调用实现-Briefly introduced the design of digital down conversion, through the use of ise the xilinx software, ipcore call the realization of
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vhdl语言写的数字下变频的实现，整个工程文件，xlinx ise用的-VHDL language written in the realization of digital down conversion, the whole project file, xlinx ise used
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自己编写的DVB-T 2K模式下接收机,包括解调模块,模拟下变频模块,数字下变频模块等 ,可直接运行.-I have written DVB-T 2K mode receiver, including the demodulator module, analog down-conversion modules, such as digital down conversion module can be directly run.
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数字下变频的Verilog程序，测试可以直接使用，将A/D信号下变频为基带I，Q两路信号-Digital down conversion of the Verilog program, testing can be used directly to A/D signal down-conversion to baseband I, Q signals two
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Digital down conversion theory
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应用matlab 软件设计了下变频器中的CIC、HB、FIR滤波器等核心模块，并将各模块融为一体从软件实现的角度完成了对系统的搭建和功能仿真。-About such key algorithms as CIC, HB, FIR of each module in down- conversion, discussion, abstraction and summarization are given in this paper. Using the MATLAB software, we des
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介绍在FPGA 器件上如何实现单通道数字下变频（DDC）系统。利用编写VHDL 程序和调用部分IP 核相结合的方法研究了数字下变频的FPGA 实现方法,并且完成了其主要模块的仿真和调试,并进行初步系统级验证。-Introduced in the FPGA device on how to achieve the single-channel digital down conversion (DDC) system. VHDL procedures and the use of the prepa
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基于DSP builder搭建的DDS模块，可以用在数字下变频中的NCO等-Based on DSP builder to build the DDS module can be used in digital down-conversion of the NCO, etc.
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仿真了DDC的工作流程，不了解数字下变频的朋友可以下载-DDC emulation of the workflow, do not understand the digital down-conversion can be downloaded to see if a friend
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CIC抽取滤波器，抽取系数8,verilog版本，用于数字下变频-CIC decimation filter, extraction coefficient of 8, verilog version, for digital down-conversion
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研究了高倍抽取的数字下变频设计，重点分析了基于级联积分梳状滤波器和级联半带滤波器的多级抽样频率算法。-Extraction of the high-powered digital down-conversion design, the focus of a cascaded integrator comb filter based on cascaded half-band filter and the multi-level sampling frequency algorithm.
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