搜索资源列表
uart_2_led_ego1
- 通过uart接受到一个8位的数据，在fpga ego上面用led显示出来(Receive a 8 bit data through UART and display it on FPGA ego with LED)
红外接收解码
- 红外接收解码 工程说明 本案例实现了编码格式为“引导码+地址码+数据码+数据反码”的红外发送数据进行接收和解码，并将收到的数据显示到七段译码器上。 案例补充说明 在实际的产品设计或业余电子制作中，编码芯片并一定能完成要求的功能，这时就需要了解所使用的编码芯片到底是如何编码的。只有知道编码方式，我们才可以使用单片机或数字电路去定制解码方案。(Infrared receiving and decoding Engineering descr iption In this case the enc
SDRAM缓冲测试程序
- 对FPGA的SDRAM进行测试，主要是实现FIFO-SDRAM-FIFO的数据传输(Test the SDRAM of the FPGA)
test_uart
- 基于fpga的uart串口通信协议，64位数据(Uart communication protocol based on fpga, 64-bit data)
mux 8_1
- 八选一数据选择器,hdl语言，基于FPGA，MAXⅡ，240T100C5.(Eight, select a data selector, HDL language, based on FPGA, MAX II, 240T100C5)
xapp585
- LVDS并行数据传输，来自XILINX官网(LVDS Parallel Data Transfer)
AOK虚拟示波器上位机源码及APP最新版
- AOK虚拟示波器的上位机源码，从串口获取下位机数据，然后绘制波形(AOK virtual oscilloscope host computer source, from the serial access to the next machine data, and then draw the waveform)
USB_OV7725
- 该源码是学习FPGA图像采集的很好的参考代码，图像传感器为OV7725，源码包含了SCCB总线的逻辑编程和数据的读取，是学习FPGA难得的源码(The source code is to learn FPGA image acquisition of a good reference code, the image sensor for OV7725, source code, including the SCCB bus logic programming and data access, i
CV_FPGA_to_HPS_Bridge_Design_Example
- FPGA通过AXI总线传输数据给ARM,ARM使用DMA方式接收数据！(FPGA to ARM Bridge design example)
嵌入式视频处理基本原理-中文版
- 嵌入式视频处理基础，对各种视频格式及视频数据流信号解码与编码进行了详细的介绍，做视频处理不可多得的工具书(Embedded video processing basis, a variety of video formats and video data stream decoding and coding are introduced in detail, very helpful for video processing)
AD7655
- 利用Verilog语言，在FPGA中实现对AD7655 16位高速高精度的采样芯片的采样数据进行读写(The Verilog language is used to read and write the sampled data of AD7655 16 bit high speed and high precision sampling chip in FPGA)
AT25160B
- 该代码完成存储器的数据存储和读取功能，该芯片是一款Atmel的SPI接口的EEPROM存储芯片。(The code completes the memory data storage and reading function, the chip is a Atmel SPI interface EEPROM memory chip.)
MAKEAMIF
- 用于生成xilinx开发环境中存储器ip core的mif数据文件的程序代码。(this program is used to generate mif file used by xilinx memory ip core.)
MAKEXCOE
- 用于生成xilinx开发环境中存储器ip core的coe数据文件的程序代码。(this program is used to generate coe file used by xilinx memory ip core.)
lab5
- 用fpga将存储在sd卡中存储的矩阵读取并显示(Read and display the matrix stored in the SD card by FPGA)
uart程序_quartus_verilog
- 该程序实现uart串口收发数据，按照通信数据格式，代码编写规范，实现fpga中uart通信功能。(The program realizes the UART serial transceiver data, according to the communication data format, code specification, to achieve UART communication function in fpga.)
ethernet_loopback
- 通过FPGA驱动千兆以太网口，完成SPARTAN6上的UDP数据包闭环测试，即通过网口发送数据包到FPGA，FPGA内部将接收到的数据返回到PC机，建议测试之前添加ARP静态绑定，FGPA内部的IP以及MAC地址在ROM里的COE文档里可以看到，发送端添加了CRC以及整体CHECKSUM的计算(Driven by FPGA Gigabit Ethernet port, UDP SPARTAN6 data packet on the closed loop test, through the ne
uart_test
- 通过FPGA，实现串口传输数据，并且可以支持多种不同的波特率，用EP4CE22F17芯片实现。(Through the FPGA, serial transmission data, and can support a variety of baud rates, using EP4CE22F17 chip implementation.)
spi_no_cs_13
- FPGA作为从机与STM32的全双工通信，FPGA将接收到STM32的数据返回到STM32，Modelsim仿真和板子仿真都通过(Use FPGA as slave,realize the communication between FPGA and STM32. The function has been tested is no problem.)
tx_rx_fifo
- 通过串口将接收到的数据存入fifo,fifo存满后使能串口发送功能，将接收到的数据发送出去(Use fifo to realize the receive and send function of the uart. The function is no problem.)