搜索资源列表
rs-5-3
- 学习使用FPGA做一些简单的编码器,RS(5,3)编码就是5个字符中有5-3=2两个校正字
RSdecoder.rar
- cpld/fpga RS(204,188)译码器的verilog程序,cpld/fpga RS (204,188) decoder of the Verilog program
rs_decoder_31_19_6_latest.tar.
- RS解码器的FPGA实现，有TestBench,RS decoder FPGA to achieve, there TestBench
final_decode
- rs解码器在fpga上的实现，采用的modelsim开发平台 -rs on fpga decoder in the realization of the development platform used in modelsim
learn_RS_coding
- 自己根据网上已有程序改写的(127,115)RS编码，有详细的注释及对FPGA实现算法的改写(参考try123.m)，希望可以让大家少走弯路-(127,115) rs encoder/decorder with detailed annotations.
rs_encorder
- RS编码的fpga实现，详细的vhdl文档，可以硬件实现。-RS coding fpga implementation, detailed documentation of vhdl can be implemented by hardware.
RS-code
- 我测试过的！Verilog HDL实现RS编码。-I' ve tested it! RS coding Verilog HDL implementation.
rs
- rs编解码，对实现了rs码的编解码，并对其误码率进行了分析仿真-rs codec, to the achievement of the rs code coding and decoding, and BER analysis simulation
uarts
- RS-232 interface example for FPGA/EDA developers
rs-codec(255-223)
- RS编码是一种纠错码，本程序实现RS（255，223）用FPGA 实现RS编码，程序在Quartus II中调试通过。-RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.
RS_Verilog
- RS码的FPGA实现，verilog语言形式，好参考资料-FPGA realization of RS code, verilog language form, a good reference
rscode
- RS编码器在fpga上的实现，用的modelsim开发环境-RS encoder in the realization of the fpga, development environment used in modelsim
rs_encoder
- RS编码器的fpga实现，有TESTBench-RS encoder to achieve the fpga, and TESTBench
rs_5_3_gf256_latest.tar
- this paper deal with rs decoder algorithm-this paper deal with rs decoder algorithm
RS
- 基于FPGA的RS编码，包括RS码的编码原理，RS电路的设计与实现-FPGA-based RS code, including the RS, the coding principle, RS Circuit Design and Implementation
miniuart2
- 用ＶＨＤＬ在CPLD/FPGA上实现与PC机的RS232通信-This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a wishbone bus, or a microcontroller, or an IP core. It works fine connected to the serial port of a
rs-232vhdl
- it is the code for doing interfacing between computer and fpga board through rs-232.
new_RS_Verilog
- 这是基于FPGA的RS编解码的实际例子。我已经调试完成！- This is arranges the decoding based on FPGA RS the actual example. I already debugged complete!
RS-design-on-FPGA
- RS算法设计在fpga上的实现文章，很详细-RS design on fpga pdf
RS-encode_FPGA
- 利用FPGA开发软件 进行rs编码的仿真 模拟RS编码的过程步骤-rs code in FPGA