搜索资源列表
dsp_core
- 可用于FPGA的DSP IP核，嵌入式必备-Can be used for FPGA-DSP IP core, embedded essential
spi_op_core
- spi controller SPI IP core
SmartSOPC_Component
- smartSOPC NIOS IP core，周立功FPGA实验箱IP核-smartSOPC NIOS IP core, Zhou Ligong FPGA experimental box IP core
vhdl-arm-core
- 用vhdl语言实现arm内核，压缩包中有19个代码共同组成这个arm内核，程序比较大，应用时要注意那个代码是顶层实体。用quartus2软件即可打开仿真。-Vhdl language used arm core, compressed package code of 19 common core component of this arm, procedures, and application code should be noted that top-level entity. Used t
SRAM_Controller
- Altera University Program的Avalon总线IP核，SRAM控制代码，可以解压后直接挂载在Avalon总线上 -Altera University Program of the Avalon bus IP core, SRAM control code can be directly mounted after decompression in the Avalon bus
Quartus
- Quartus中fft ip core的使用.txt-Fft ip core in Quartus use. Txt
8086
- 基于FPGA的8086/8088 IP核-8086/8088 FPGA IP Core
VHDLAVRIPcore
- 使用VHDL语言写的AVR单片机IP核， 可以直接使用，已经经过验证， 十分珍贵哦-Written in VHDL language using the AVR microcontroller IP core, can be used directly, has proven very valuable oh
myfir
- 利用fir滤波器ip-core设计滤波器，数据为16bit，速率为61.44mhz，工作时钟为245.76mhz-The use of fir filter ip-core design of filters, the data for the 16bit, rate 61.44mhz, working clock 245.76mhz
core_licenses_full
- 这个是XILINX公司FPGA的aurora，IP授权！！完全好用!-This is the XILINX' s FPGA-aurora, IP licensing! ! Totally easy to use!
mc8051
- Oregano Systems 8051 ip核-Oregano Systems 8051 ip core
fifo
- fifo使用手册，对于用IP core使用非常方便-fifo manual, for use with the IP core is very convenient
pci_32tlite_oc
- 嵌入式 pci总线IP core的rtl源代码，用Verilog实现-Embedded pci bus IP core of the rtl source code, Verilog realization of
components
- quartus的几个IP核（PWM,RAM,I2C）-quartus several IP core (PWM, RAM, I2C)
qam_64
- 64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核-64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS
Ipcoredesign
- 微电子/软硬IP核设计：IP核脚本指南，模型开发指南-Microelectronics/soft and hard IP core design: IP core scr ipting Guide, Model Development Guide
FFT
- IP核！！高速傅立叶变换的VHDL源代码 可以综合-IP core! ! High-speed Fourier transform of the VHDL source code can be integrated!!
uart16550_latest[1].tar
- 开源UART IP核16550，该IP核兼容16550 UART，具有Modem功能，完全可编程的串行接口具有可设置的字符长度、奇偶校验、停止位以及波特率生成器。-Open-source UART IP core 16550, the IP core is compatible with 16550 UART, with Modem function, fully programmable serial interface can be set up with a character lengt
ip
- 易语言取本机外网IP源码，无任何模块，纯核心支持库-The easy language to take outside this aircraft net IP the sound code, does not have any module, pure core support storehouse
12130_ARM_Core
- arm 核，VHDL语言描述的IP软核，仅供学习-arm-core, VHDL language to describe the IP soft core, only to learn