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6-1
- Matrix multiplexer and position
MuxDemux_E1_E3
- Multiplexer and demultiplexer from E1 to E3 stream
datademux
- FPGA multiplexer .-FPGA multiplexer .
mux03
- multiplexer is the best device which can be used by everyone
demux
- 与多工器功能相反，可将一个位元的资料透过选择分配输出端的其中一个。 -In contrast with the multiplexer function can be a bit of information on the allocation of the output by selecting one of them.
mux
- the multiplexer program are designed 2:1 and 4:1 in verilog model
c8051f020
- Cygnal C8051F系列单片机的功能部件包括模拟多路选择器可编程增益放大器ADCDAC电压比较器电压基准温度传感器SMBus/ I2CUARTSPI可编程计数器/定时器阵列PCA定时器数字I/O端口电源监视器看门狗定时器WDT和时钟振荡器等所有器件都有内置的FLASH存储器和256字节的内部RAM有些器件还可以访问外部数据存储器RAM即XRAM Cygnal C8051F系-Cygnal C8051F MCU' s features, including analog multi
digital-frequency
- 数字频率计 采用Verilog语言编写，分为8个模块，分别是计数器，门控，分频，寄存器，多路选择，动态位选择，BCD译码模块-Digital frequency meter using Verilog language, divided into eight modules, namely, the counter, gated, frequency, register, multiplexer, Dynamic Choice, BCD decoding module
Priority_Encoder
- Unlike a multiplexer that selects one individual data input line and then sends that data to a single output line or switch, an Encoder takes all the data inputs one at a time and converts them to a single encoded output. Then, it is a multi-input da
Encoder_Using_Assign_Statement
- Encoder Using Assign Statements: Unlike a multiplexer that selects one individual data input line and then sends that data to a single output line or switch, an Encoder takes all the data inputs one at a time and converts them to a single encoded o
8bitmultiplexer
- Simple eight bit multiplexer using VHDL.
mux_casez
- 用verlog写的复用器，16选1 简单但很实用-Written with verlog multiplexer, 16 selected a simple but very useful
abc
- Abstract—This paper describes a pseudorandom carrier modulation scheme and its harmonic spectra spread effect. The pseudorandom carrier of the proposed scheme are produced through the random synthesis of the two triangular carriers, each of the
sfunxyz
- matlab simulink to draw 3D graph. It is very useful to know how sfunction works. Also, you can see how multiplexer is connected to draw a graph of 3 axises x y and z.
cpu
- 包括1) 时钟发生器 2) 指令寄存器 3) 累加器 4) RISC CPU算术逻辑运算单元 5) 数据控制器 6) 状态控制器 7) 程序计数器 8) 地址多路器 -1) clock generator 2) instruction register 3) accumulator 4) RISC CPU arithmetic logical unit 5) of the data controller 6) state controller 7),
multiplexer_case1
- multiplexer using vhdl
vsim
- multiplexer 16_1 is a multiplexer with 16 inputs and 1 output.
VerilogSourceCode
- 乘法器、除法器、多路选择器、编码器、BCD码转换、加法器、减法器、状态机、四位比较器、数码管、串口、跑马灯、电子钟-Multiplier, divider, multiplexer, encoder, BCD code converter, adder, subtractor, state machines, four more players, digital control, serial port, marquees, electronic clock
ADC0832
- ADC0831/ADC0832/ADC0834/ADC0838 8-Bit Serial I/O A/D Converters with Multiplexer Options-english
MuxDemux_E1_E3
- E3 -Mux / Demux - Multiplexer of 16 E1 Channels-E3 -Mux / Demux - Multiplexer of 16 E1 Channels