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F06x_ADC2_ExternalInput_Mux
- C8051F060 内部多通道切换开关测量8路不同电压的程序.测量电压结果,并通过串口打印功能将测量结果传到计算机终端.-This code example illustrates using the internal analog multiplexer to measure analog voltages on up to 8 different analog inputs. Results are printed to a PC terminal program via the
pca9541
- I2C multiplexer driver for PCA9541 bus master selector
pca954x
- I2C multiplexer driver for Linux.
demux1
- design of a de-multiplexer in vhdl
punto4.3.tar
- Testing Multiplexer on verilog
punto4.4.tar
- Testing Multiplexer on verilog another way
trabajoprevio.tar
- Testing Multiplexer on verilog pre-lab
qq
- LINUX下的网络聊天程序，其中利用select函数，实现服务端IO口多路复用-LINUX network chat program, select function IO port multiplexer server
ps2mult
- TQC PS/2 Multiplexer driver
The-VHDL-various-basic-code
- VHDL的各种基本代码 包括4选1,8选1多路选择器，8位全加器，加1减1计数器，序列检测器，异步清零16位加减可控计数器，数码管扫描程序，双2选1，状态机等基本程序！-VHDL basic code including 4 election 1,8 to 1 multiplexer selector, 8-bit full adder, plus 1 minus 1 counter sequence detector, asynchronous clear 16 plus or minus
pio
- Atmel PIO2 Port Multiplexer support driver
project1
- 4比1多路选择器，HDl verilog语言编写，能在DE2上运行-4 to 1 multiplexer, HDl verilog language, able to run on the DE2
CNT4
- ise组合逻辑电路中的4选1多路选择器+仿真文件-ise combinational logic circuit 4 to 1 multiplexer+ simulation file
mux21
- ise13.2环境下VHDL编写的2选1多路选择器+仿真波形-ise13.2 environment, VHDL, 2-to-1 multiplexer+ simulation waveforms
VHDL_book1
- gate：基本逻辑门的实现和验证 mux4_1_gate：多路复用器的门级实现和验证 mux4_1_behav：多路复用器的行为级实现和验证 seg7_gate：7段数码管逻辑门实现和验证 seg7_behav：7段数码管case语句描述和验证 mux7seg：采用按键复用7段数码管的实现和验证 clkseg7：采用时钟自动扫描复用7段数码管的实现和验证 comp4_gate：4位比较器结构化实现和验证 comp8_behav：8位比较器行为实现
xinhaochouyang
- 信号的频域分析及应用 熟悉调制信号功率谱的计算及调制过程的频谱搬移现象； 观察多路调制信号的时域与频域的波形，熟悉FDMA频分多路复用的特点-Signal in the frequency domain analysis and application of familiarity modulated signal power spectrum calculation and spectrum modulation process moving phenomenon observe the
oscope-1.5.tar
- c语言编写 示波器模拟软件， 具体看英文介绍。- This is an oscilloscope program written in c using the XForms library. It uses the PC s parallel port for data input. The way it s done is as follows: first data bit 1 is set to 1 then to 0 to enable the a-to-d
serial
- 多路复用写的一个可收发数据的串口应用程序-Write a multiplexer can send and receive serial data applications
Using-Behavioural-Style
- vhdl code for implementation of multiplexer and demultiplexer on fpga
at_18b20_2
- 51单片机采用18B20多路（8路）测温，带LCD1602显示-51 SCM 18B20 multiplexer (8) temperature with LCD1602 display