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paobiao
- 给出了数字跑表的源代码，设计了分频模块，实现了真实的时间计数，通过这个工程的训练，能更好的了解Quartus II数字电路开发的过程。-Digital stopwatch given the source code, design the sub-frequency module, the realization of the true count of time, through this project the training, to better understand the Quart
TimeQuest_Basic
- Quartus里面的TimeQuartus资料-Quartus inside information TimeQuartus
ff
- QUARTUS II平台上的基于VHDL语言的电梯系统控制程序。-QUARTUS II platform based on the VHDL language elevator system control procedures.
Execise
- altera官方网站上资料的示例代码Quartus II Software Design Series Foundation-altera official website information sample code Quartus II Software Design Series Foundation
Sinout
- dds正弦可控发生计全结果 用到matlab，dsp，Quartus II 6.0软件-dds controllable sinusoidal occurred wholly the result of use of matlab, dsp, Quartus II 6.0 software
vga_timing
- 此乃VGA驱动的详细源码，并配有PLL。使用Quartus II 开发。-This is a detailed source VGA driver with a PLL. Use Quartus II development.
newvhdl
- 在 Quartus II 7.1平台下，用VLDL写的一个计时器的程序-a timer written in VLDL in Quartus II 7.1 platform
VGAdisplay
- VHDL入门实验。256色VGA显示驱动 开发软件Quartus II 6.0 芯片EP2c8Q208-VHDL entry experiment. 256-color VGA display driver development software Quartus II 6.0 chip EP2c8Q208
LCD
- Quartus, Sopc Builder搭建的CPU，通过NIOS控制LCD。工程文件。-Quartus, Sopc Builder to build the CPU, through the NIOS control LCD. Engineering documents.
Crack_QII72
- 对于quartus 7.2软件进行破解的工具保-For quartus 7.2 crack tools software security
word
- Code was successfully implemented within ALtera FPGA with Quartus 6.0. It presents two polish own female names: ULA and ALA whose are scrolling on the 4-columns crystal LED. When you press the switch it will turn from ULA into ALA and continue scroll
PLLTEST
- Altera Quartus to Pll Source
NIOS_LED
- 完整的Nios 2 演示工程，包括Quartus II 工程和NIOS IDE下的c代码。采用NIOS 2处理器控制LED。已通过实验测试。-Complete Nios 2 demonstration projects, including the Quartus II and NIOS IDE works under the c code. NIOS 2 processor to control the use of LED. Experimental tests have passed.
piano
- 电子琴，quartus开发环境，硬件连接模型，蜂鸣器-piano
miffile
- 用matlab产生mif文件。(Altera的EDA软件，如maxplus，quartus等用到的初始化rom，ram等的文件格式)-Mif files generated by matlab. (Altera' s EDA software, such as maxplus, quartus used to initialize and so on rom, ram, such as the file format)
quartus-reading-and-thinking
- 本资料详细介绍了quartus11的使用方法和使用quartus11进行硬件详细开发流程。-quartus11：simple using the quartus11 sofeware .
FIFO
- 512×8bid的FIFO 含工程文件，基于QUARTUs-512 × 8bid the FIFO with the project document, based on the QUARTUsII
16bit_display8bitLED
- Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. In
Leon_tutorial_Altera_english
- Leon Altera Boarsds. This shows how to synthesis leon processor to altera boards through the use of quartus 3.-Leon on Altera Boarsds. This shows how to synthesis leon processor to altera boards through the use of quartus 3.
Time
- 24小时时钟设计程序，含有时，分，秒的电路设计，基于VHDL语言，用Quartus 2程序实现。-24-hour clock design process, with hour, minute, second circuit design, based on the VHDL language, using Quartus 2 program.