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AD7865test1
- verilog hdl写的利用fpga控制ad7865进行多路ad数据采集的程序源代码。
ADC
- 用verilog编程实现的基于FPGA的AD数据采集程序
AD9229-FPGA-files
- adi串行AD AD9229的控制使用ISE平台 Verilog语言
serial_adda
- 硬件语言描述串行DA和AD转换，FPGA控制。能够很好的实现高精度的模数数模转换-verilog descr iption of the serial DA and AD conversion, FPGA control.
FPGA_AD7822
- 基于FPGA的AD转换控制器设计，AD7822，quartus II，verilog hdl-A Design of the A/D Convertion Control Module Based on FPGA
adc
- 用verilog实现TLC549——AD采集实验，采集完的数送给数码管显示-TLC549- AD Acquisition experimental collection finished with verilog number sent to the digital tube display
ADS7852
- FPGA采用VHDL语言驱动ADS7852的程序,-FPGA and ADS7852
ADC124
- 采用verilog编写的高速串型AD采集芯片adc124驱动代码，占用le较少，效率高，目前我应用在较多产品上-Verilog prepared using high-speed string-type AD Acquisition chip adc124 driver code, occupation le small, high efficiency, the current I applied to more products
ntc
- NTC电阻在VERILOG HDL中的曲线表，使用1MA恒流源供电，用AD对其采集电压，并以12BIT形式输出查表即可达到实际温度值，本表占用450个12位存储单元-NTC resistor VERILOG HDL in the curve of the table, use the 1MA current source power supply voltages were collected with AD and in the form of the output look-up table
adc_spi
- dsp通过SPI接口数据采集 sigma-delta ADC采集程序-dsp through the SPI interface, data acquisition sigma-delta ADC acquisition program
logic
- 多通道扫描AD控制逻辑。Verilog语言编写-AD control logic multi-channel scanning
SRAM_interface
- PSRAM 和flash接口的verilog实现。-Numonyx M18 SCSP StrataFlash with PSRAM interface ( AD-Mux)。
ADCODE
- 用FPGA控制双ADC0809读写，用于双AD热备控制，用verilog实现-FPGA control with dual ADC0809 read and write, hot standby control for double AD, with verilog implementation
ads7809
- ADS7809是Burr-Brown公司推出的高精度AD采集芯片。它采用5V单电源供电,内含16位 逐次逼近寄存器,采样精度高,功耗小。 用Verilog实现其配置-ADS7809 is a Burr-Brown Introduces High Precision AD capture chip. It uses a single 5V supply, with 16-bit successive approximation register, sampling and high pre
rom_con_aa
- VERILOG 多线程控制程序，实现状态机控制ad采集-VERILOG multi-threaded control program, to achieve a state machine control ad acquisition
test
- xilinx ise6.3编译环境，verilog控制程序。实现对外部ad转换数据自动采集计算，并发送到DSP最后处理-xilinx ise6.3 build environment, verilog control procedures. To achieve automatic data acquisition external ad converter calculated and sent to final processing DSP
netAD0809
- verilog描述的AD转换，简要的描述的AD转换的过程-verilog descr iption of AD
ADSample_FPGA
- 开发环境为QuartusII。这是AD采样的verilog代码部分，在FPGA上硬件实现AD采样的一部分功能-Development environment for the QuartusII. This is the verilog code for part of the AD sample, the FPGA hardware on the part of the function AD sampling
max118FPGA
- 控制AD。。利用verilog编写的控制max118的程序。文件包含仿真波形文件。-The use of written control max118 verilog program. File contains the simulation waveform files.
AM调制解调
- 基于Artix-7 FPGA的AM调制解调代码，从AD读入信号后，进行AM调制，并解调输出（将代码分成两个工程就是AM的调制和解调），其中解调用到的数字滤波采用MATLAB设计(The AM modulation and demodulation code based on artix-7 FPGA, after reading the signal from AD, carries out AM modulation, and demodulates the output (the code