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usb
- 实现了USB接口。介绍了如何使用VERILOG语言实现USB的程序设计。
usb11.rar
- 基于verilog HDL的一个USB 1.1的IP 核,内有详细文档说明。,Verilog HDL based on a USB 1.1 of the IP core, which has detailed documentation.
FPGA-usb-control
- USB 68013 通用固件 和配套上位机程序以及下位机FPGA程序verilog 可实现USB高速通信-USB 68013 generic PC firmware and supporting procedures and lower computer USB FPGA program can achieve high-speed communications
H.264
- 详尽地论述了H.264 特点、编码器原理、解码器原理、编解码器的实现。为了更好地理解H.264 编解码原理及其实现,第7 章详细介绍了H.264 码流的句法和语义。最后对H.264 视频编码传输的QoS 进行了专门地论述。-H.264 are discussed in detail the characteristics of the principle of encoders, decoders principle, the realization of codec. To better un
USB2.0
- usb2.0 fpga程序 用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve
usbFPGAconnect
- 该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序,FPGA上的VERILOG通信程序。-The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, incl
FPGA_Interface_verilog
- verilog数字接口实验程序,包括USB,矩阵键盘,蜂鸣器,串口,i2c总线接口程序实例。-verilog digital interface for experimental procedures, including the matrix keyboard, buzzer, serial, i2c bus interface program instance.
lcd-code
- 比较完整的LCD接口代码,verilog编写,分为6800和8080两种CPU接口,且有完整的仿真程序-Relatively complete LCD interface code, verilog prepared 6800 and 8080 is divided into two types of CPU interfaces, and there is a complete simulation program
xtp051_sp601_schematics
- Xilinx公司最新的Spartan 6系列FPGA所用的开发板电路图,详尽包括了电源、IO、外设、USB等部分的内容,极具有参考价值,另外还有一个USB芯片 68013所使用的HEX文件可供下载-Xilinx' s new Spartan 6 Series FPGA development board used in circuit detail, including the power, IO, peripherals, USB and some other content, most
USBipcore
- usb1.1 ip核,使用verilog编写-usb1.1 ip nuclear, prepared using the Verilog
usb
- USB完整代码 包括vhdl和verilog两种-usb ip core
VerilogFPGAUSB
- 用Verilog(FPGA)实现USB源代码大家-Using Verilog (FPGA) source code we look to achieve USB
usbjtag
- 用于USB blaster下载线设计的JTAG仿真用的Verilog源码-For the USB blaster download cable design simulation using Verilog source JTAG
module-usb
- usb verilog code for transmitter
USB
- USB控制器的VERILOG工程文件,工程为ISE的,可以编译通过,压箱底的东西了-USB controller VERILOG project file, works for the ISE, you can compile, pressure bottom of things
USB_CY7C68013_Verilog
- 利用verilog语言读写基于CY7C68013A的USB器件,使用,轻松上手。-Use language to read and write verilog CY7C68013A based USB device, use, easy to get started.
usb
- USB的verilog IP模块,经过DesignCompiler综合验证-USB-verilog IP module, comprehensive verification through DesignCompiler
fpga usb
- 基于fpga的usb端口verilog调试程序,可利用键盘鼠标控制开发板的一些动作
usb
- verilog rtl code for usb controller.
VERILOG_USB2.0源代码
- 基于verilog针对CY68013开发的USB通信程序(USB communication program based on Verilog for CY68013 development)