搜索资源列表
VGA_Pattern
- FPGA用于控制VGA数模转换芯片ADV7123的Verilog控制代码；实现了VGA的显示时序，输出包括vga_hs,vga_vs,vga_clk,vga_blank,vga_sync,vga_R,vga_G,vga_B-The verilog code for control ADV7123 with FPGA.
VGA
- 基于Verilog的VGA显示程序 用于实现FPGA对于VGA显示器的控制实现图像显示，并给出相关测试的TB文件-The VGA display program based on Verilog FPGA for implementing the control of the VGA display Image display
ps2_mouse_interface
- ps2接口的鼠标与vga接口的驱动程序，Verilog HDL语言，运用于FPGA-ps2_mouse_interface and vga in Verilog HDL language, applied to FPGA
codeFPGA
- source code verilog for get image 320x240 rgb form pc and display it on vga monitor
Verilog
- 一些用verilog编写的小程序，有全加器，计数器，比较器VGA显示，键盘扫描等-Some small programs written using verilog have full adder, counter, comparator VGA display, keyboard scanning, etc.
Snake
- Verilog, Snake game, VGA, Keyboard
VGADIY
- 自己编的VGA彩条信号发生器verilog ise环境-Own the VGA color signal generator verilog ise Environment
vga_timing_gen
- verilog文件 实现VGA时序驱动，产生vsync和hsync信号。附有自检测程序。-Verilog file to achieve VGA timing-driven, resulting in VSYNC and HSYNC signals. With self-testing procedures.
DE2_NIOS_HOST_MOUSE_VGA
- 在DE2开发板上实现的VGA输出游戏。硬件用Verilog语言编写，在Quartus上编译；软件用C语言编写，在Nios2上编译运行。把DE2板和显示器键盘连起来即可使用。-Development in the DE2 board game to achieve the VGA output. Hardware using Verilog language, compiled in the Quartus software with C language, compiled to run in
TrackingPresentation_jon
- presentation a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s-presentation on a low cost video tracking algorithm implemented on an Altera DE2 board wi
61EDA
- 分析了各种视频采集方案的研究现状。对如何采用CCD 摄像头采集高分辨率、高质量的图像以及基于FPGA 的嵌 入式视频图像采集系统的实现方法进行了研究。采用了以摄像头+ 解码芯片模式为采集方案， 针对视频解码芯片 ADV7181B，实现了I2C 总线配置、ITU656 解码、VGA 显示模块的设计。设计的视频采集控制器已经在Altera 公司的CycloneII 系列FPGA(EP2C35)上实现。结果显示本设计具有速度高、成本低、易于集成等优点-Analysis of a varie
vga
- vga显示程序，用verilog 语言编写，程序运行测试完全没有问题。-vga display program, with verilog language, the program run the test is no problem.
vgactl9
- EPM240+IS61LV1024+VERILOG实现简单的VGA控制器,RGB各1bit,与AT91SAM7S64接口.-EPM240+ IS61LV1024+ VERILOG to achieve a simple VGA controller, RGB each 1bit, and AT91SAM7S64 interface.
MTDB_VGA_TV
- Verilog语言，NTSC格式，pal格式（稍作修改）的模拟信号转换成数字信号，在VGA显示器上显示-Verilog ,pal , NTSC , VGA
vgav2
- fpga vga 输出，60HZ 640*480 8位灰度图像 采用verilog语言编写-fpga 640*480 60HZ vga output，writed in verilog
DE2_TV_PAL
- video信号pal制转vga输出，fpga verilong语言编写-fpga pal to vga ，writed in verilog
WORKS
- Project of Adquisition Data, show in VGA and send to usb host
altera_up_avalon_vga
- VGA altera官方例程Verilog代码 详细说明很好很实用-VGA altera detailed descr iption of the official routine Verilog code for a very good very practical
VGA_v
- 基于 FPGA 的VGA显示控制器设计（采用Verilog 语言） 控制VGA显示模块 VGA_HS,VGA_VS1,VGA_BLANK时序的发生器。包括测试程序 采用ALTERA Cyclone II系列芯片EP2C8Q208C8N芯片测试成功。-module VGA(CLK_50,RST_N,VGA_HS,VGA_VS1,VGA_BLANK, VGA_CLK,VGA_SYNC,VGA_R,VGA_G,VGA_B) input
example
- 我FPGA开发板的程序！！！包括数、码管iic、VGA、乘法器、串口。加法器、比较器、状态机等等等了，主要是VHDL的也有部分好似Verilog的。参考下吧-verilog...vga..uart...add...etc..