搜索资源列表
dpll界面程序
- matlab 5.3中菜单unicontrol设计中如何传递变量。本人写了一个非常简单的界面程序，请大家帮忙建评一下一下。-menu design unicontrol how to pass variables. I wrote a very simple interface program, we help build commentary about what.
dpll_4
- 实现4阶数字锁相环，老外写的，有详细注释，如果您觉得不错，就re一下-achieve four bands DPLL, a foreigner writing a detailed notes, if you think it's good, what re
all_digital_phase_locked_loop
- 一篇关于数字锁相环的很好的文章，费了很大力气才搞到的-a DPLL on the good paper, and a great effort will involve the
dpll
- Quantization effect on a 2nd order DPLL design When quantization resoultion b varies, the DPLL has different outputs. This difference can be seen from step response, sine and other inputs (chirp as illustrative example).
PLL_grt_rtw.rar
- C语言实现了数字锁相环的程序，不过程序比较复杂，得参照MATLAB中 Discrete 3-phase pll模型,C language implementation of the DPLL procedure, but more complicated procedures, may refer to MATLAB, Discrete 3-phase pll model
DPLL
- pll 的数字实现大家 支持 第一次 传-pll digital impliment
DPLL
- Dpll source core ,it is very good for some one-Dpll source core,it is very good for some one
dpll
- 本文介绍了锁相环路的基本原理，并着重分析了数字锁相环的结构、原理。利用Verilog语言对数字锁相环的主要模块进行了设计，并用Modelsim软件进行仿真。最后给出了整个系统的仿真结果，验证设计的正确性，并在现场可编程门阵列FPGA上予以实现-dpll
Untitled8
- source code and matlab code for second order dpll in digital signal processor
ver3
- 全数字锁相环的verilog代码，希望能有帮助-The DPLL verilog code, hoping to help! ! !
DPLL
- 一个全数字锁相环，可用于信号的复用中，进行调制和借条操作。-A digital phase-locked loop can be used to signal multiplexing, modulation and IOU operations.
dpll
- simulation of a digital pll for power system
dpll_fixpt
- simulation ofa dpll fixed point for single phase system
基于DSP的60kW_300kHz高频感应加热电源
- 介绍了一种基于DSP 的高频感应加热电源。现以MOSFET为开关器件，并通过逆变器并联扩容为60kW/300kHz。采用多重斩波技术，增大了斩波电路的容量，将基于DSP 的fuzzy-DPLL 复合数字锁相环技术应用在高频场合，使锁相有快速的动态性能和高精度的稳态性能，实现了对负载频率的可靠跟踪及对逆变状态的可靠控制，提高了逆变器 的工作效率和功率因数。(A high frequency induction heating power supply based on DSP. MOSFET i