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51汇编程序1ASM
- 本程序用于测试实时时钟模块SD2000的SRAM存储器D/E系列， 程序功能如下： 1. 关闭/INT1及/INT2的中断输出 2. 初始化时间(写时间数据) 3. 在BREAKPOINT1设断点时,依次读时间-写SRAM数据-读SRAM数据循环 4. 全速执行时,LED四位分别显示小时和分钟的值-procedures used to test the real-time clock module SD2000 SRAM memory D / E Series, procedures follo
SRAM
- 这是一个sram接口驱动程序，能够驱动256kbx16bit的sram
FIFO
- verilog编写的读写fifo的源码，包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
apb_slave
- AMBA 2.0 APB Example- SRAM -AMBA 2.0 APB Example- SRAM
interleaver
- This is a convolutional interleaver code written in verilog, the ram is sram with ram_ncs, ram_nwe, ram_noe characters.
sram
- 对常用的sram完成读写控制，可以根据具体地址增加参数，非常灵活-Commonly used to read and write sram to complete control, can be increased in accordance with the specific parameters of address, a very flexible
IS61WV51216
- iss simulation model for 512KX16 SRAM
code_20-08-09
- CPLD Interface code with SRAM
sram
- to write and read from an sram. its actually a logic cell,when the write enable is high its possible to write data onto a memory location when read enable is high we can read the data in given memory location
63535309sram
- verilog编写的读写SRAM的源码，包括sram的读写控制-SRAM read and write verilog source code written in, including the sram to read and write control
vhdl_sram_ctrl
- Sycronous SRAM in CPLD or FPGA module... tested by Altera MaxPlusII or Quatus -Sycronous SRAM in CPLD or FPGA module... tested by Altera MaxPlusII or Quatus II
FPGA-SRAM
- FPGA 实验、SRAM 读写实验，达尔EDA 实验室EP2C5 型或EP2C8 型FPGA/SOPC 实验板—dl2c58c_v3-Experimental FPGA, SRAM read and write experimental, Total the EDA lab EP2C5 type or the EP2C8 type FPGA/SOPC experimental board-dl2c58c_v3
SRAM
- STM32F103 RBT6 下的 sram 接口程序-STM32F103 RBT6 sram interface program under
sram
- amada fanuc 16lb laser sram backup
SRAM
- sram verilog里面包含了 sram verlog学习之后写的 一些相关程序-is good for sram verilog sdudy
外部SRAM实验 512K
- 芯片stm32f103 IS62WV25616 测试(Chip STM32F103 IS62WV25616 test)
SRAM
- SRAM读写测试实例，每秒钟进行一次单字节的SRAM 读和写操作，用chipscope查看时序波形。(SRAM read and write test instances, each time a single byte SRAM Read and write operations, use chipscope to see the timing waveform.)
FPGA控制SRAM的读写
- FPGA控制SRAM的读写，通过测试！！！！！！！！！！！！！！！！(FPGA controls the reading and writing of SRAM)
DMA_SRAM
- TMS320F28335 DMA读取SRAM程序(TI TMS320F2833528335 DMA-SPI)
DSP_run_flash&sram
- 本文介绍了两种烧写模式，一种是烧写进flash，一种是烧写进sram,在两个文件夹内，并且每种模式已经整理好源代码，分享给大家。(This article introduces two burning mode, one is burning into flash, the other is burning into sram, in two folders, and each mode has been sorted out the source code, to share with you