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quartus2
- 一个介绍软件使用方法的东东,一定会对你有帮助的. -introduced a software method of Eastern, we will help you.
4_Adder_Unique
- Quartus2实现的四位进制并行加法器 用VHDL语言实现
forpof
- quartus2 7.1 版本的license,FPGA开发工具的授权文件
ledwater
- 使用VHDL语言编写的跑马灯程序，利用Quartus2可以对其编译下载-The use of VHDL language Marquee procedures, the use of their compiler can download Quartus2
intro_to_quartus2_chinese
- intro_to_quartus2_chinese,不用我多说，就是quartus2的简体中文教程了，这个编程软件的详细说明！-intro_to_quartus2_chinese, Needless to say, is the Simplified Chinese quartus2 tutorial, this detailed descr iption of programming software!
61EDA_B409
- 采用高速A_D的存储示波器设计 在quartus2 中用的 用vhdl语言写的-The use of high-speed storage oscilloscope A_D design using VHDL quartus2 used in written language
serial
- 利用VHDL语言编写的串口程序，可以在Quartus2环境下编译下载-Use the serial language VHDL program can be compiled in an environment Quartus2 Download
learn_rom_99multi
- 基于quartus ii 9.0的99乘法器，用rom表做成的乘法器可以计算9*9的乘法，并在数码管上显示，使用时请按照自己的芯片和引脚设置。-Quartus ii 9.0 based on 99 multiplier, made by rom multiplier table can calculate the multiplication 9* 9, and in the digital control display, according to their own use when the
Crack_patch_license
- Quartus II 6.0 破解补丁和license设置-Quartus II 6.0 crack patch and license settings
DDS
- 基于FPGA的DDS的相位累加器详细介绍,是VHDL编程,利用quartus2平台.-Design of Direct digital synthesis Signal Generator
ch5
- quartus2的使用方法，有实例讲述，一定可以帮助到初学者。-how to use quartus2
quartus2
- quartusII实用指南，对了解和学习quartusII很有帮助的。 -quartusII practical guide to understanding and learning quartusII helpful.
VFIFOzipe
- 用verilog实现异步FIFO，代码中有两个模块，使用时时注意顶层模块和底层模块，用quartus2即可打开直接使用。 -Asynchronous FIFO, with verilog code has two modules, using the constant attention of top-level module and bottom module with quartus2 to open.
vFFPPGAproe
- VERILOG HDL 实际工控项目源码开发工具 alltera quartus2 -VERILOG HDL practical industrial projects source code development tools alltera quartus2
bahe
- quartus2 实现的15灯的电子拔河游戏-quartus2 achieve 15 lamp electronic tug of war game
alarm
- 基于Quartus2的数字钟实现 能实现准备走时和报点-alarm based on Quartus2
mux16
- 用verilog写的乘法器，在quartus里可以直接运行，有详细注释(Multiplier written in Verilog, in quartus can run directly, with detailed notes)
Exp302
- 这是一个在quartus2上写好的JK触发器，下载并运行其中quartus文件即可。(This is a JK trigger written on quartus2, downloading and running the quartus file.)
CPLD-FREQUENCY CONTROL
- 通过手动和自动方式对输出频率进行设置，通过锁相环输出。(The output frequency is set by manual and automatic mode, and output by the phase locked loop.)