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ramchoice
- 多总线切换的VHDL代码。可用于多RAM的管理。
ddr_ctrlv
- ddr ram controller vhdl code
rom
- 根据实验要求,对rom和ram进行验证,实现各项功能。-According to the experimental requirements of rom and ram for authentication, the realization of various functions.
FPGA-TWO-RAM
- 这样就可以在FPGA内实现双口RAM了-This can be achieved in the FPGA dual-port RAM
control
- Turbo码编码器时序控制模块,能够对于RAM,ROM读写以及编码器其他功能模块的使能进行控制-Turbo code encoder timing control module, to the RAM, ROM reader and encoder modules, other functions can be controlled so that
interleaver
- This is a convolutional interleaver code written in verilog, the ram is sram with ram_ncs, ram_nwe, ram_noe characters.
FIFORAM
- FIFO RAM 存储器以FIFO形式进行的读取-FIFO RAM
fifo_design
- 异步fifo的设计,能够很好的的完成,数据的缓冲,内部有ram存储器-The design of asynchronous fifo, Asynchronous fifo design, can be a good completion of the data buffer, internal ram memory
RAM
- Code for designing 16 bit RAM
ram
- 代码实现了一个由32位寄存器组成的寄存器组,并有多个控制输入和两个输出,方便使用。-The code implements a 32-bit register consisting of registers, and there are multiple control inputs and two outputs, easy to use.
jj
- 本题设计一个数字存储示波器,以Xilinx公司20万门FPGA芯片为核心,辅以必要的外围电路(包括信号调理、采样保持、内部触发、A/D转换、D/A转换和I/O模块),利用VHDL语言编程,实现了任意波形的单次触发、连续触发和存储回放功能,并按要求进行了垂直灵敏度和扫描速度的挡位设置。信号采集时,将外部输入信号经信号调理模块调节到A/D电路输入范围,经A/D转换后送入FPGA内部的双口RAM进行高速缓存,并将结果通过D/A转换送给通用示波器进行显示,完成了对中、低频信号的实时采样和高频信号的等效采
dualportram_vhdl
- 采用VHDL硬件描述语言实现的双口径RAM块存储器的初始化-VHDL hardware descr iption language using the dual-caliber RAM block memory initialization
S_ram
- This is code of static ram in vhdl
RAM1
- 自己实现的ram,使用vhdl语言写的,经常在项目中使用-a ram written by vhdl ,very good
ram
- vhdl实现简单寄存器,没有那么复杂,上vhdl课编出来的,对学生比较好理解。-vhdl simple register
dual_port_ram
- True dual port ram VHDL implementation
ram
- This file is about create memory in ISE by VHDL language.
ram2114
- 一个简单的2114存储器,哈工大计算机组成原理(intel 2114 ram, from hit computer)
75_RAM
- fpga中对RAM的VHDL程序,非常之实用(FPGA in the RAM VHDL procedures, very practical)
Block_RAM
- ditributed ram in fpga and block ram in fpga