搜索资源列表
DES_16keys用VC生成DES加解密算法的16轮密钥
- 用VC生成DES加解密算法的16轮密钥, 可直接用于编写DES的VHDL的密钥生成模块 -Generated using DES encryption and decryption algorithm VC 16-round keys can be directly used to write the VHDL DES key generation module
aes-vhdl 使用vhdl语言实现aes(rijndael 算法)
- 使用vhdl语言实现aes(rijndael 算法),程序整体封装成为一个package,方便调用-Using vhdl language aes (rijndael algorithm), the program as a whole package as a package, easy call
aes加密算法实现,经过FPGA验证的
- aes加密算法实现,经过FPGA验证的!,aes encryption algorithm, after FPGA validation!
sha1_v01.zip
- SHA-1加密算法的IP核,内涵文档,仿真测试文件,SHA-1 encryption algorithm of the IP core, the connotation of documents, simulation test file
mulf2m.rar
- 椭圆曲线加密算法中的乘法器的生成,主要功能是实现在素域上的多项式模P(大素数)乘的运算。,Elliptic curve encryption algorithm to generate the multiplier, the main function is to achieve in the Su-domain polynomial module P (large prime numbers) by the operator.
des3.rar
- 3des加密算法实现,经过FPGA验证的!,3des encryption algorithm, after FPGA validation!
rom_des
- DES 加密算法的VHDL和VERILOG 源程序及其TESTBENCH。-VHDL and VERILOG sourcecode and TESTBENCH of DES encrypting algorithm
md5_latest[1][1].tar
- MD5算法verilog代码,很不错的,可以互相交流学习-MD5 algorithm verilog code, and a very good
HMAC-MD5
- HMAC — MD 5算法的硬件实现,可以对初学者有一定得帮助。-HMAC- MD 5 algorithm for hardware implementation
高级加密算法
- AES加密和解密源码!-AES encryption and decryption source!
sha1_verilog
- 安全散列算法的另一种verilog实现,对面积的要求更小,但损失了速度,但在一般系统中,完全可以满足大部分需要了-Secure Hash Algorithm another Verilog realization of the demands of a smaller area, but a loss of speed, but in the general system, fully satisfy the needs of the most
sha
- sha加密算法实现,经过FPGA验证的!-sha encryption algorithm, after FPGA validation!
AES
- AES算法的verilog代码,即AES算法IP核-ip core for AES
DESCryptographicAlgorithm
- des加密算法,用于IP通讯方面的,用VHDL写成的源程序-des encryption algorithm used for IP communications.the source codes are written in VHDL
systemcaes_latest.tar
- 高级加密标准aes加密算法用fpga实现的Verilog源代码。-Advanced encryption standard aes encryption algorithm using fpga implementation Verilog source code.
Logistichecat
- 将猫映射(cat map ) 与Logist ic 映射相结合, 构造了一种语音加密算法. 该算法首先将语音数据堆叠成二维, 然后利用二维猫映射将数据的位置置乱, 最后利用一维Logist ic 映射构造替换表, 对数据进行扩散.-The cat map (cat map) and Logist ic mapping the combination of a voice encryption algorithm is constructed. The algorithm first voic
DES_Encrypt_Decrypt_Verilog
- DES加密算法的Verilog HDL实现,带模式选择端口,可以实现加密和解密,已经modelsim仿真通过。-Des En/Decrypt,Verilog HDL code
DESsuanfa
- DES的加解密算法的实现,无错,非常适合毕业设计运用-DES encryption and decryption algorithm, error-free
topic
- DES加密算法的VHDL和VERILOG源程序- Xilinx开源共享61EDA代码工厂-DES encryption algorithm of VHDL and VERILOG source code- Xilinx factory open source code sharing 61EDA
AES
- 详细描述了AES加密算法的过程及S盒变换,用VHDL语言描述,通俗易懂-AES encryption algorithm is described in detail the process and transform S box, with the VHDL language to describe, easy to understand