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plltips
- 技术文章《采用PLL设计时需注意的问题》在工程设计中有参考价值-technical article, "using PLL design attention to the problem" in engineering design reference value
PLLDesignAssistant
- PLL design assistnat-- tells you how to design a good P
pll_charge_pump
- charge pump for PLL at analog IC design
MHPerrottPhDThesis
- Ph.D thesis from M.H.Perrott, about Fractional-N PLL design.
frequencySynthesis
- 频率合成器环路滤波器的设计，介绍由集成锁相芯片PE3236 和集成锁相芯片ADF4107 组成的单环锁相环常用的环路滤波器。-Frequency synthesizer loop filter design, introduced by the integrated phase-locked-chip phase-locked PE3236 and an integrated single-chip component Central ADF4107 PLL loop filter common
DDR_interface
- 高速DDR存储器数据接口设计实例. 1. 将文件拷入硬盘 2. 产生DQS模块 3. 产生DQ模块 4. 产生PLL模块 5. 拷贝以上步骤生成的文件到子目录【Project】中 6. 打开子目录【Project】中的DataPath.qpf工程，设计顶层模块 7. 编译并查看编译结果 -High-speed DDR memory interface design data. 1. Copyed into the document hard disk 2. DQS
dean_banerjee_pubns_-_pll_performance_simulation_
- PLL design and simulation
DesignoftrackingloopofGPSsoftwarereceiver
- 本文在分析GPS 软件接收机跟踪原理的基础上，首先比较码环与载波环不同鉴相器的性能，然后对二阶锁相环中不同环路参数设下的跟踪效果进行仿真分析，最后设计 了合适的码环与载波环路，并用实际采集的GPS 数据论证了所设计环路的有效性，为GPS 软件接收机跟踪环路的设计提供了参考。-Based on the analysis of GPS receiver tracking software on the basis of the principle, first compare the diffe
PLL
- PLL锁相环的详细介绍，电子书包括设计及应用，对研究锁相环的很有用-Introduction of PLL，include design and application，it s useful for research of PLL
jtcurran_oscpll_taes2012
- Digital GNSS PLL Design Conditioned on Thermal and Oscillator Phase Noise
designsteps
- matlab pll design and simulation,classical example.
kissContentmatrix
- charge pump for PLL at analog IC design div hr div B 文件列表 B ： div div()
SSJRGAX
- charge pump for PLL at analog IC design div hr div B 文件列表 B ： div div()