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viter2
- verilog实现卷积码的译码，viterbi算法-verilog to achieve the decoding convolutional codes, viterbi algorithm
viterbi
- 一个vitrtbi算法的参考实现,verilog的-A reference implementation vitrtbi algorithm, verilog of
urn_nbn_se_liu_diva-6949-1__fulltext
- Viterbi decoder algorithm
diff_viterbi_decode
- viterbi 译码，不是个人随便写出的东西到处乱发，是公司内部产品-viterbi decode
dafeldib2004
- In this document - decoder Viterbi on VHDL with low power architecture.
vertibi
- (2,1,7)viterbi convolutional code encoding, decoding, debugging through, you can directly use
turbocodes_latest.tar
- 基于sova算法的Turbo码解码VHDL工程文件，非常经典，包含Python高层仿真代码。-Turbo Decoder Release 0.3 MAIN FEATURES - * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * MyHDL cycle/bit accurate model * Synthesizabl