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winrs232
- 一个COM PORT的测试程式,能过COM 回路治具来实现.COM回路接法1-7-8,2-3,4-6-9,5-a COM PORT testing programs, COM will be a loop with governance to be achieved. COM Circuit law 1-7-8,2-3,4-6-9,5
huiluceshi
- vb与串口通信的关于回路测试的小程序 很实用，我自己做的-vb and serial communication on the small loop testing procedures very useful, I do
fet120_1
- Toggle P1.0 by xor ing P1.0 inside of a software loop.-Toggle P1.0 by xor ing P1.0 inside of a softw are loop.
c6_PLLsim
- 这个程序是matlab用来来对锁相环（PLL）进行仿真的，这样的选择基于多方面的考虑-This procedure is used Matlab to the phase-locked loop (PLL) simulation, This choice is based on a number of considerations
bd_ber
- 闭环MIMO系统中的预编码技术块对角化程序，主要是误码率-loop MIMO system of pre-coding technology to block diagonalization procedure is mainly BER
PhaseLockedLoop
- ％The phase locked loop(PLL),adjusts the phase of a local oscillator ％w.r.t the incoming modulated signal.In this way,the phase of the ％incoming signal is locked and the signal is demodulated.This scheme ％is used in PM and FM as well. ％We wi
GPS_code_nco
- 这是GPS接收机，基带处理模块中累加模块设计代码，用于码跟踪环。代码设计巧妙，避免了消耗FPGA中比较稀缺的硬件乘法器资源。-This is the GPS receiver, Baseband Processing Module cumulative module design code for the code tracking loop. Code so cleverly designed to avoid the consumption of more FPGA hardware mul
genzong 提供直扩系统的跟踪环路的matlab程序
- 提供直扩系统的跟踪环路的matlab程序，并对其误差进行分析-Direct expansion system to provide tracking loop matlab program, and its error analysis
costas_loop
- costas环载波同步与解调，其中有环路滤波器系数估算-costas loop carrier synchronization and demodulation, including the loop filter coefficients estimation
verilog
- 采用用verilog语言编写的全数字锁相环的源代码。-Verilog language used by all-digital phase-locked loop' s source code.
PLL
- 锁相环问题的仿真，可以解决数字锁相环的仿真问题-Phase-locked loop simulation problem, can solve the problem of digital phase-locked loop simulation
tpc
- Simulink and Stateflow model of IS-95A CDMA reverse traffic channel power control. Includes reverse traffic channel physical layer, together with open and closed loop algorithms for base station and mobile implemented as state machines with Stateflow
costas_carrier_recover
- 基于硬件定点的完整的costas载波恢复环设计，FPGA设计可以用之参考。包括输入QPSK信号，16倍符号率采样，初始频差2.4KHz，以及低通滤波器的设计等待。最重要的是有本人的注释，易于上手。-Hardware-based fixed-point of complete costas carrier recovery loop design, FPGA reference design can be used. Including input QPSK signal, 16 times th
PrenticeHallPrincipleofCommunicationSystemSmulatio
- 本书分成三部分，第一部分讨论了仿真的作用和方法论。第二部分介绍了采样定理，滤波器模型、锁相环等的仿真。第三部分是高层建模与仿真方法。-The book is divided into three parts, the first section discusses the role of simulation and methodology. The second part of the sampling theorem, the filter model, phase-locked loop
synchronization
- 利用matlab仿真实现载波的平方环载波同步,costas环载波同步和符号同步.-achieved quadratic loop carrier synchronization, costas loop synchronization and symbol synchronization within matlab
loop
- 死循环，通过死循环不断获取usb传递的信息-Loop through the loop constantly get the message usb
Closed-Loop-MIMO-OFDM
- In high-data-rate wireless systems focus on the integration of orthogonal frequency-divisionmultiplexing (OFDM), multiple-inputmultiple-output (MIMO) and closed-loop techniques
loop-parameters-selection
- 二阶锁相环设计中环路参数的选择。详细推导了参数设置。-Two order phase locked loop design of loop parameters selection
QPSK_NDATED_DDPED_R2011
- The Gardner two - order loop algorithm, the Simulink model, was found for a long time. It can be used by pro - measurement.
costas loop for BPSK demod
- Costas loop for BPSK demodulation