搜索资源列表
r8x8dct
- 应用于视频编解码算法中的前向DCT算法在ADSP-BLACKFIN5**实现-used video codec algorithm to the first DCT algorithm ADSP-BLACKFIN5 achieve **
tvp5150
- tvp5150视频编解码芯片驱动程序,cpu通过i2c控制该芯片,将驱动程序放入driver/i2c/chips目录下,并且在makefile文件中加入该驱动编译即可。-tvp5150 Video Decoder Chip driver, cpu through i2c control of the chip Add to Driver driver/i2c/chips directory, and the makefile to accede to the document can be dr
dm643_videoH263
- DM643上采集视频信号,对其进行H.263编码和解码,并驱动视频编码芯片进行显示。包括了视频编解码芯片的驱动和h.263 codec-DM643 video signal on the acquisition, its H.263 coding and decoding Drivers and video coding chip show. Including Video Decoder Chip drive and h.263 codec
smgEngine
- 符合xdm标准的算法历程,使用视频编解码接口,调用了vfpe驱动
VideoH263
- dm642 h.263 视频编解码源程序
em8300-0.13.0-RH9
- Sigma EM8300片(机顶盒上音视频编解码芯片)SDK,机顶盒开发必备
I2C_Controller.rar
- 对视频编解码芯片ADV7181进行合理的配置,使其输出符合ITUR656标准的视频流,Of the ADV7181 video decoder chip for a reasonable configuration, so that the output in line with the standard video streaming ITUR656
shipingchuli
- 给出了一种基于$3C2410嵌入式SoC的网络视频会议终端的实现方案,在具体分析了软件测试中出现的H.263视频编解码及MicroWindows视频显示效率低的问题后,通过对H.263编解码器中的DCT分块变换、运动估计算法及GUI的FrameBuffer视频显示,进行了有针对性的改进工作,使软件充分利用了嵌入式S3C-2410的硬件资源,从而满足了嵌入式网络终端实时视频通信的实用需要.-This paper presents a $ 3C2410-based SoC embedded netw
h263_loopback
- H263视频编解码 DM642开发平台 摄像头采集视频,经过DM642编码,解码最后输出-H263 video codec DM642 development platform acquisition video camera, after DM642 encoding, decoding the final output
dm646x_h264bp_enc_1_00_013_ee
- 最新的TI DSP TMS320DM6467的达芬奇开发平台的demo驱动和视频编解码算法,可以实现高清视频的实时编码和同步解码,功能强大 -The latest TI DSP TMS320DM6467 DaVinci development platform of the demo driver and video codec algorithm, can achieve real-time HD video encoding and decoding simultaneously, powe
obtrack
- 基于BF533的视频采集及显示,利用DSP的I/O口模拟IIC接口对SAA7113、ADV7179视频编解码芯片进行配置-BF533-based video capture and show,use DSP s I/O port simulating IIC interface to config SAA7113, ADV7179 video codec chip
DEC643Video_example
- dsp视频例程,静态图像采集,视频编解码七编程-dsp video examples
HardwareDesignofEmbededVideoSUrveillanceSystemBase
- :以视频编解码硬件系统及其实现技术为研究内容,以TMS320DM642为核心,结合TVP5150&SAA7105视频编解 码芯片,设计了高性能的视频监控系统。详细说明了系统架构以及各功能模块,给出了各模块的硬件连接图,并结合实际设 计中碰到的问题给出解决方法。最后在此基础上简要介绍了系统的应用前景以及功能扩展 -This paper emphasizes the hardware design and realization of video encoding/decoding sy
video_scaling
- TI EVMDM642的视频scaling的源码,包括视频口的配置代码,外部视频编解码芯片的配置程序等,对于学习DM642的开发有较大帮组-TI EVMDM642 video scaling of the source code, including video port configuration code, the external video codec chip configuration procedures for the greater development of learnin
Vedio_FPGA
- 基于FPGA和SOPC的视频图像处理,视频编解码,系两篇硕士论文,其中一篇需要用CAJ阅读器打开-FPGA and SOPC based on video image processing, video codec, two master' s thesis, Department, of which a reader needs to open with CAJ
I54V4OPt
- H.264系列视频编解码器Windows和Windows CE/Windows Mobile版本)-H.264 video codec series of Windows and Windows CE/Windows Mobile version)
SOPC-movie-IP
- 基于SOPC 的视频编解码IP 核的设计-SOPC-based video codec IP core design
111111111
- 基于FPGA的高清视频编解码系统控制模块设计-Based on FPGA high-definition video decoding system control module design
composite_loop
- 实现复合视频输入输出,摄像头采用外部采集设备(Implementing Compound Video Input and Output)
h264 编解码源码
- 基于h264协议实现的 视频传输编解码源码