搜索资源列表
aescore
- 基于FPGA的AES算法实现的VERILOG源代码，对于信息安全专业研究AES算法的硬件实现很有用-FPGA-based AES algorithm implementation VERILOG source code, for the information security professional research of the hardware implementation of AES algorithm is useful
CoreAES128
- Full AES Simulation Code
aes
- 实现了AES在赛灵思器件上的加密程序 我已经调试过完全正确-Xilinx achieved in AES encryption device debugging process I have been absolutely correct
aesencryption
- Aes encryption on Fpga
AES!
- AES algorithm very good code tested in xilinx ise tool
sbox
- verilog code for s-box generation for AES algorith
aes_pipe_latest.tar
- implementation of AES encryption algorithm in vhdl/verilog
AES
- AES implementation in VHDL@!
Encryption
- AES implementation in VHDL!! Wit LCD controls-AES implementation in VHDL!! Wit LCD controls!!
decryption
- AES decryption in VHDL!! Wit LCD controls
09912007AEScoremodules
- aes descr iption architecture processes vhdl code with pipelining and throughput reduction with an aim to create a faster AES decoding system in FPGA
AES-sopc--ip
- 在FPGA上实现了AES，并写了基于AVALON总线的接口，主要使用是VHdL实现，并在SOPC系统上定制了IP核。-FPGA to realize the AES, and write the AVALON based on the bus interface, the main use is VHdL implementation, and the SOPC system in custom made IP core.
aes_-vhdl
- aes encription coding in vhdl language