搜索资源列表
caport
- DVB数字机顶盒中CA的通用接口源代码和通信数据格式分析。采用C编写-The source code written in C language for general interface of CA ,which is used for DVB digital SET top box ,and analysis about communication data.
aduc7000_pwm
- This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simulator may be used to monitor and display any variable or peripheral I/O register. It is already configured to show the PWM output signal on PORT3.0 an
keil_iodemo
- The project KEIL_IODemo shows how to use memory allocation routines (malloc) and char I/O (printf, scanf) via a serial interface with the Keil ARM toolchain. The I/O functions are adapted for the Analog Devices ADuC7000 series using the SERIAL.C
gnu_iodemo
- UART I/O and Memory Allocation Example for GNU The project GNU_IODemo shows how to use memory allocation routines (malloc) and char I/O (printf, scanf) via a serial interface with the GNU toolchain. The I/O functions are adapted for the Analog
GPS_C_Code
- GPS CA码及导航电文发生器仿真研究C/A源代码-GPS navigation message and code generator simulation C / A code
CA-vfdl
- GPS C/A码 发生器 LFSR 源代码 VHDL 语言-GPS C / A code generator LFSR VHDL source code
2440mmc-and-camera
- 2440mmc-and-camera-linux-driver -2440mmc-and-camera - linux-driver 2440m mc-and-camera - linux-driver2440mmc-and-ca mera - linux-driver
DCT_vhdl
- IDCT-M is a medium speed 1D IDCT core -- it can accept a continous stream of 12-bit input words at a rate of -- 1 bit/ck cycle, operating at 50MHz speed, it can process MP@ML MPEG video -- the core is 100％ synthesizable-IDCT-M is a medium speed
ATMega8-UART
- ATMega8 中断方式UART测试程序 ,其硬件:CA-M8 时钟:外部4MHz-socket UART interrupt testing procedures, hardware : CA-M8 Clock : 4 MHz external
Mega8-UART-duilie
- 基于队列的Mega8 UART通信驱动程序 文件名:uart.c 编译：WinAVR-20070122 硬件：CA-M8X 时钟：外部4MHz
5105_pcb_sch.rar
- Protel 99 可以打开。里面是5105芯片的机顶盒硬件设计方案和一个bin文件。包括pcb sch2个文件和一个bin文件。bin文件是用来共享某些CA系统的智能卡的。有了这3个文件，就可以找工厂代工生产硬件及烧录应用软件了。,Protel 99 can open. There are 5105 chip set-top box hardware design program and a bin file. Including pcb sch2 file and a bin file. b
csmaca
- ieee802.15.4 wlan网络中防冲突算法csma/ca的实现。-ieee802.15.4 wlan network anti-collision algorithm for CSMA/ca.
mmc_sd
- SD/MMC卡文件读写系统（FAT32），是一个大系统的一部分，但已包括完整的FAT32文件系统各个部分。-SD/MMC card read and write file system (FAT32), is a big part of the system, but have included a complete all parts of FAT32 file system.
foundtrend08
- FPGA Architecture: Survey and Challenges Ian Kuon1, Russell Tessier2 and Jonathan Rose1 1 The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada, {ikuon, jayar}@eecg.utor
CH35XDRV.ZIP
- 测试用文档本设计主要由数字信号发生器和逻辑分析仪组成，其中数字信号发生器运用了89C51单片机系统，可以重复输出8路循环逻辑移位序列，逻辑分析仪用了89C55单片机系统，可以实现8路信号的采-test file http://googleads.g.doubleclick.net/pagead/ads?client=ca-pub-
bcd2_7ca
- VHDL unit for 7-segment (CA) driver.
CA-CFAR
- CA CFAR Algorithm implementation in FPGA
TEC-CA-experimentprocedure
- TEC-CA学生实验指导书 1.TEC-CA 介绍 2.调试软件DebugController的介绍 3.计算机组成原理实验详解 4.vhdl语法介绍-Of TEC-CA student experiment instructions 1.TEC-the CA describes the introduction of the debugging software DebugController. Principles of Computer Organization exper
st 20系统的ca解扰模块的初始化
- st 20系统的ca解扰模块的初始化，及ca系统id的判定，节目解扰及是否可以录制-st 20 system ca the descrambling module initialization, and ca system id determination program the descrambling and whether you can record
CA-code
- 生成CA码verilog代码，quartusII开放环境，含源代码和仿真文件（波形、testbench）-CA generated code verilog code, quartusII open environment, including source code and simulation files (Waveform, testbench)