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lfsr
- 此实验介绍了伪随机序列的产生原理，并用verilog语言将其编码实现，有详细的代码备注-This experiment introduces the principle of pseudo-random sequence and its encoded with the verilog language implementation, a detailed code Notes
LFSR
- lfsr implement in fpga
profiles
- source code of counter,ram,lfsr etc
pnseed
- calculates Linear Feedback Shift Register(LFSR) mask and seed values for a specific phase shift.
LFSR
- LFSR模块，单个模块，实现移位寄存器，生成测试用pattern-LFSR
cdma
- vhdl code for flip-flop,lfsr
demo-lfsr
- Demo of LFSR pseudo random number generator
BIST
- A simple BIST in VHDL. It contains a LFSR with an SISR.
4bit.lfsr.counter
- 4 bit lfsr 随机数 移位计数器-4bit lfsr counter and layout
8LFSR
- 8阶LFSR,有文档介绍，算是比较好的一个了-8-order LFSR, a document describes the
lfsr
- linear feedback shift register verilog code
lfsr
- lfsr.vhd - The top module in the project. lfsr_pkg.vhd - The package file used for supporting the lfsr top module. lfsr_tb - A testbench code for lfsr module. manual.pdf - A short documentation on this project. README.txt - A short descr i
lfsr
- the LFSR is coded in VHDL, using a structural descr iption, which is instantiated as a separate component in the top-level design. Then we can get a random number by a pseudorandom number generator based on a linear feedback shift register (LFS
lfsr
- In computing, a linear feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state.
lfsr-counter
- descr iption for LFSR counter
FIFO-Controller-with-LFSR
- FIFO Controller With LFSR
LFSR-FINAL-DELIVERY
- lfsr code of full versation working
verilog-lfsr-updown-counter
- Verilog 8 bit LFSR Up-Down Counter
LFSR
- Verilog code for an 8-bit LFSR